參數(shù)資料
型號: CS61577
廠商: Cirrus Logic, Inc.
英文描述: T1/E1 Line Interface(T1/E1線接口)
中文描述: T1/E1線路接口(個T1/E1線接口)
文件頁數(shù): 4/44頁
文件大?。?/td> 632K
代理商: CS61577
ANALOG SPECIFICATIONS
(TA = -40
°
C to 85
°
C; TV+, RV+ = 5.0V
±
5%; GND = 0V)
Parameter
Min
Typ
Max
Units
Receiver
RTIP/RRING Input Impedance
Sensitivity Below DSX (0dB = 2.4V)
-
50k
-
-
0.30
-
-
-
-
dB
mV
V
-13.6
500
-
Loss of Signal Threshold
Data Decision Threshold
T1, DSX-1
T1, DSX-1
T1, (FCC Part 68) and E1 (Note 22)
(Note 20)
(Note 21)
60
53
45
160
65
65
50
175
70
77
55
190
% of peak
% of peak
% of peak
bits
Allowable Consecutive Zeros before LOS
Receiver Input Jitter Tolerance
(Note 23)
10kHz - 100kHz
2kHz
10Hz and below
0.4
6.0
300
-
-
-
-
-
-
UI
UI
UI
Jitter Attenuator
Jitter Attenuation Curve Corner Frequency
Attenuation at 10kHz Jitter Frequency
Attenuator Input Jitter Tolerance (Before Onset
of FIFO Overflow or Underflow Protection)
Notes: 20. For input amplitude of 1.2 V
pk
to 4.14 V
pk
.
21. For input amplitude of 0.5 V
pk
to 1.2 V
pk
and from 4.14 V
pk
to RV+.
22. For input amplitude of 1.05 V
pk
to 3.3 V
pk
.
23. Jitter tolerance increases at lower frequencies. See Figure 11.
24. Attenuation measured with input jitter equal to 3/4 of measured jitter tolerance. Circuit attenuates
jitter at 20 dB/decade above the corner frequency. See Figure 12. Output jitter can increase
significantly when more than 12 UI’s are input to the attenuator. See discussion in the text section.
(Notes 17, 24)
(Notes 17, 24)
-
-
6
-
-
-
Hz
dB
UI
50
23
(Notes 17, 24)
12
CS61577
4
DS155PP2
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CS61577_09 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:T1/E1 Line Interface
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