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參數(shù)資料
| 型號： | CS5533-ASZ |
| 廠商： | Cirrus Logic Inc |
| 文件頁數(shù)： | 4/43頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 16BIT PGIA 2-CH 24-SSOP |
| 標(biāo)準(zhǔn)包裝： | 59 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 3.84k |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 45mW |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SSOP（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-SSOP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 4 個差分，單極；4 個差分，雙極 |
| 產(chǎn)品目錄頁面： | 755 (CN2011-ZH PDF) |
| 其它名稱： | 598-1114-5 |
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CS5531/32/33/34-AS
12
DS289F5
2. GENERAL DESCRIPTION
The CS5531/32/33/34 are highly integrated
Σ An-
alog-to-Digital Converters (ADCs) which use
charge-balance
techniques
to
achieve
16-bit
(CS5531/33) and 24-bit (CS5532/34) performance.
The ADCs are optimized for measuring low-level
unipolar or bipolar signals in weigh scale, process
control, scientific, and medical applications.
To accommodate these applications, the ADCs
come as either two-channel (CS5531/32) or four-
channel (CS5533/34) devices and include a very-
low-noise, chopper-stabilized, programmable-gain
instrumentation amplifier (PGIA, 6 nV/
√Hz @ 0.1
Hz) with selectable gains of 1×, 2×, 4×, 8×, 16×,
32×, and 64×. These ADCs also include a fourth or-
der
Σ modulator followed by a digital filter which
provides twenty selectable output word rates of 6.25,
7.5, 12.5, 15, 25, 30, 50, 60, 100, 120, 200, 240, 400,
480, 800, 960, 1600, 1920, 3200, and 3840 Samples
per second (MCLK = 4.9152 MHz).
To ease communication between the ADCs and a
microcontroller, the converters include a simple
three-wire serial interface which is SPI and Mi-
crowire compatible with a Schmitt-trigger input on
the serial clock (SCLK).
2.1. Analog Input
Figure 3 illustrates a block diagram of the
CS5531/32/33/34. The front end consists of a multi-
plexer, a unity gain coarse/fine charge input buffer,
and a programmable gain chopper-stabilized instru-
mentation amplifier. The unity gain buffer is activat-
ed any time conversions are performed with a gain
of one and the instrumentation amplifier is activated
any time conversions are performed with gain set-
tings greater than one.
The unity gain buffer is designed to accommodate
rail to rail input signals. The common-mode plus
signal range for the unity gain buffer amplifier is
VA- to VA+. Typical CVF (sampling) current for
the unity gain buffer amplifier is about 50 nA
(MCLK = 4.9152 MHz, see Figure 4).
The instrumentation amplifier is chopper stabilized
and operates with a chop clock frequency of
MCLK/128. The CVF (sampling) current into the
VREF+
Sinc
Digital
Filter
XGAIN
M
U
X
AIN2+
AIN2-
AIN1+
AIN1-
CS5531/32 IN+
IN-
AIN4+
AIN4-
*
AIN1+
AIN1-
CS5533/34
M
U
X
IN+
IN-
IN+
IN-
GAIN is the gain setting of the PGIA (i.e. 2, 4, 8, 16, 32, 64)
X1
VREF-
X1
Differential
4
Order
Σ
Modulator
th
5
Programmable
Sinc
Digital Filter
3
Serial
Port
1000
1000
22 nF
C1 PIN
C2 PIN
X1
Figure 3. Multiplexer Configuration
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CS5533-ASZ/H1 | 制造商:Cirrus Logic 功能描述: |
| CS5533-ASZR | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC IC 16-Bit ADCs w/UltraLw Noise PGIA RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| CS5534 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:16 BIT AND 24 BIT ADCS WITH ULTRA LOW NOISE PGIA |
| CS5534-AS | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 4-Ch 24-Bit ADCs w/ Ultra Low Noise PGIA RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| CS5534-ASR | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC IC 24-Bit ADCs w/UltraLw Noise PGIA RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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