參數(shù)資料
型號： CS5532-ASZ
廠商： Cirrus Logic Inc
文件頁數(shù)： 7/43頁
文件大?。?/td> 0K
描述： IC ADC 24BIT 2CH W/LNA 20SSOP
標準包裝： 66
位數(shù)： 24
采樣率（每秒）： 3.84k
數(shù)據(jù)接口： 串行
轉換器數(shù)目： 1
功率耗散（最大）： 45mW
電壓電源： 模擬和數(shù)字，雙 ±
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 20-SSOP（0.209"，5.30mm 寬）
供應商設備封裝： 20-SSOP
包裝： 管件
輸入數(shù)目和類型： 2 個差分，單極；2 個差分，雙極
產品目錄頁面： 755 (CN2011-ZH PDF)
配用： 598-1159-ND - BOARD EVAL FOR CS5532U ADC
其它名稱： 598-1112-5
CS5531/32/33/34-AS
DS289F5
15
instruct the converter to perform single or multiple
conversions or calibrations with the converter in
the mode defined by one of these Setups.
Using the single conversion mode, an 8-bit com-
mand word can be written into the serial port. The
command includes pointer bits which ‘point’ to a
16-bit command in one of the Channel Setup Reg-
isters which is to be executed. The 16-bit Setups
can be programmed to perform a conversion on any
of the input channels of the converter. More than
one of the 16-bit Setups can be used for the same
analog input channel. This allows the user to con-
vert on the same signal with either a different con-
version speed, a different gain range, or any of the
other options available in the channel setup regis-
ters. Alternately, the user can set up the registers to
perform different conversion conditions on each of
the input channels.
The ADCs also include continuous conversion ca-
pability. The ADCs can be instructed to continu-
ously convert, referencing one 16-bit command
Setup. In the continuous conversions mode, the
conversion data words are loaded into a shift regis-
ter. The converter issues a flag on the SDO pin
when a conversion cycle is completed so the user
can read the register, if need be. See the section on
Performing Conversions for more details.
The following pages document how to initialize the
converter, perform offset and gain calibrations, and
how to configure the converter for the various con-
version modes. Each of the bits of the configuration
register and of the Channel Setup Registers is de-
scribed. A list of examples follows the description
section. Also the Command Register Quick Refer-
ence can be used to decode all valid commands (the
first 8-bits into the serial port).
2.2.1. System Initialization
The CS5531/32/33/34 provide no power-on-reset
function. To initialize the ADCs, the user must per-
form a software reset by resetting the ADC’s serial
port with the Serial Port Initialization sequence.
This sequence resets the serial port to the command
mode and is accomplished by transmitting at least
15 SYNC1 command bytes (0xFF hexadecimal),
followed by one SYNC0 command (0xFE hexa-
decimal). Note that this sequence can be initiated at
anytime to reinitialize the serial port. To complete
the system initialization sequence, the user must
also perform a system reset sequence which is as
follows: Write a logic 1 into the RS bit of the con-
figuration register. This will reset the calibration
registers and other logic (but not the serial port). A
valid reset will set the RV bit in the configuration
register to a logic 1. After writing the RS bit to a
logic 1, wait 20 microseconds, then write the RS bit
back to logic 0. While this involves writing an en-
tire word into the configuration register, the RV bit
is a read only bit, therefore a write to the configu-
ration register will not overwrite the RV bit. After
clearing the RS bit back to logic 0, read the config-
uration register to check the state of the RV bit as
this indicates that a valid reset occurred. Reading
the configuration register clears the RV bit back to
logic 0.
Completing the reset cycle initializes the on-chip
registers to the following states:
Note:
Previous datasheets stated that the RS bit
would clear itself back to logic 0 and therefore
the user was not required to write the RS bit
back to logic 0. The current data sheet
instruction that requires the user to write into
the configuration register to clear the RS bit
has been added to insure that the RS bit is
cleared. Characterization across multiple lots
of silicon has indicated some chips do not
automatically reset the RS bit to logic 0 in the
configuration register, although the reset
function is completed. This occurs only on
small number of chips when the VA- supply is
negative with respect to DGND. This has not
Configuration Register:
00000000(H)
Offset Registers:
00000000(H)
Gain Registers:
01000000(H)
Channel Setup Registers:
00000000(H)
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相關代理商/技術參數(shù)
參數(shù)描述
CS5532-ASZR 功能描述:模數(shù)轉換器 - ADC IC 16-Bit ADCs w/UltraLw Noise PGIA RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
CS5532-BS 功能描述:模數(shù)轉換器 - ADC 2-Ch 24-Bit ADCs w/ Ultra Low Noise PGIA RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
CS5532-BSR 功能描述:模數(shù)轉換器 - ADC IC 16-Bit ADCs w/UltraLw Noise PGIA RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
CS5532-BSZ 功能描述:模數(shù)轉換器 - ADC 2-Ch 24-Bit ADCs w/ Ultra Low Noise PGIA RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
CS5532-BSZ/H 制造商:Cirrus Logic 功能描述:
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