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參數(shù)資料
| 型號(hào)： | CS5174ED8 |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 1.5 A 280 kHz/560 kHz Boost Regulators |
| 中文描述： | 2.4 A SWITCHING REGULATOR, 620 kHz SWITCHING FREQ-MAX, PDSO8 |
| 封裝： | SOIC-8 |
| 文件頁數(shù)： | 10/22頁 |
| 文件大小： | 184K |
| 代理商： | CS5174ED8 |
CS5171, CS5172, CS5173, CS5174
http://onsemi.com
10
APPLICATIONS INFORMATION
THEORY OF OPERATION
Current Mode Control
+
Driver
C
O
R
LOAD
V
SW
X5
SUMMER
Slope Compensation
V
C
Oscillator
D1
V
CC
S
R
Q
In Out
PWM
Comparator
L
63 m
Figure 27. Current Mode Control Scheme
Power Switch
The CS517x family incorporates a current mode control
scheme, in which the PWM ramp signal is derived from the
power switch current. This ramp signal is compared to the
output of the error amplifier to control the ontime of the
power switch. The oscillator is used as a fixedfrequency
clock to ensure a constant operational frequency. The
resulting control scheme features several advantages over
conventional voltage mode control. First, derived directly
from the inductor, the ramp signal responds immediately to
line voltage changes. This eliminates the delay caused by the
output filter and error amplifier, which is commonly found
in voltage mode controllers. The second benefit comes from
inherent pulsebypulse current limiting by merely
clamping the peak switching current. Finally, since current
mode commands an output current rather than voltage, the
filter offers only a single pole to the feedback loop. This
allows both a simpler compensation and a higher
gainbandwidth over a comparable voltage mode circuit.
Without discrediting its apparent merits, current mode
control comes with its own peculiar problems, mainly,
subharmonic oscillation at duty cycles over 50%. The
CS517x family solves this problem by adopting a slope
compensation scheme in which a fixed ramp generated by
the oscillator is added to the current ramp. A proper slope
rate is provided to improve circuit stability without
sacrificing the advantages of current mode control.
Oscillator and Shutdown
Figure 28. Timing Diagram of Sync and Shutdown
V
SW
Current
Ramp
Sync
The oscillator is trimmed to guarantee an 18% frequency
accuracy. The output of the oscillator turns on the power
switch at a frequency of 280 kHz (CS5171/2) or 560 kHz
(CS5173/4), as shown in Figure 27. The power switch is
turned off by the output of the PWM Comparator.
A TTLcompatible sync input at the SS pin is capable of
syncing up to 1.8 times the base oscillator frequency. As
shown in Figure 28, in order to sync to a higher frequency,
a positive transition turns on the power switch before the
output of the oscillator goes high, thereby resetting the
oscillator. The sync operation allows multiple power
supplies to operate at the same frequency.
A sustained logic low at the SS pin will shut down the IC
and reduce the supply current.
An additional feature includes frequency shift to 20% of
the nominal frequency when either the NFB or FB pins
trigger the threshold. During power up, overload, or short
circuit conditions, the minimum switch ontime is limited
by the PWM comparator minimum pulse width. Extra
switch offtime reduces the minimum duty cycle to protect
external components and the IC itself.
As previously mentioned, this block also produces a ramp
for the slope compensation to improve regulator stability.
Error Amplifier
+
+
CS5172/4
CS5171/3
Figure 29. Error Amplifier Equivalent Circuit
2.0 V
200 k
250 k
1M
positive erroramp
negative erroramp
1.276 V
FB
NFB
V
C
C1
R1
5 k
0.01 F
Voltage
Clamp
120 pF
For CS5172/4, the NFB pin is internally referenced to
2.5 V with approximately a 250 k input impedance. For
CS5171/3, the FB pin is directly connected to the inverting
input of the positive error amplifier, whose noninverting
input is fed by the 1.276 V reference. Both amplifiers are
transconductance amplifiers with a high output impedance
of approximately 1 M , as shown in Figure 29. The V
C
pin
is connected to the output of the error amplifiers and is
internally clamped between 0.5 V and 1.7 V. A typical
connection at the V
C
pin includes a capacitor in series with
a resistor to ground, forming a pole/zero for loop
compensation.
An external shunt can be connected between the V
C
pin
and ground to reduce its clamp voltage. Consequently, the
current limit of the internal power transistor current is
reduced from its nominal value.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CS5174GD8 | 1.5 A 280 kHz/560 kHz Boost Regulators |
| CS5174GDR8 | 1.5 A 280 kHz/560 kHz Boost Regulators |
| CS5172GDR8 | 1.5 A 280 kHz/560 kHz Boost Regulators |
| CS5173GDR8 | 1.5 A 280 kHz/560 kHz Boost Regulators |
| CS5172(中文) | 1.5 A 280 kHz/560 kHz Boost Regulators(1.5 A 280 kHz/560 kHz，升壓調(diào)整器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CS5174ED8G | 功能描述:直流/直流開關(guān)調(diào)節(jié)器 1.5A High Efficiency Boost RoHS:否 制造商:International Rectifier 最大輸入電壓:21 V 開關(guān)頻率:1.5 MHz 輸出電壓:0.5 V to 0.86 V 輸出電流:4 A 輸出端數(shù)量: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFN 4 x 5 |
| CS5174EDR8 | 功能描述:直流/直流開關(guān)調(diào)節(jié)器 1.5A High Efficiency RoHS:否 制造商:International Rectifier 最大輸入電壓:21 V 開關(guān)頻率:1.5 MHz 輸出電壓:0.5 V to 0.86 V 輸出電流:4 A 輸出端數(shù)量: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFN 4 x 5 |
| CS5174EDR8G | 功能描述:直流/直流開關(guān)調(diào)節(jié)器 1.5A High Efficiency Boost RoHS:否 制造商:International Rectifier 最大輸入電壓:21 V 開關(guān)頻率:1.5 MHz 輸出電壓:0.5 V to 0.86 V 輸出電流:4 A 輸出端數(shù)量: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFN 4 x 5 |
| CS5174GD8 | 功能描述:直流/直流開關(guān)調(diào)節(jié)器 1.5A High Efficiency RoHS:否 制造商:International Rectifier 最大輸入電壓:21 V 開關(guān)頻率:1.5 MHz 輸出電壓:0.5 V to 0.86 V 輸出電流:4 A 輸出端數(shù)量: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFN 4 x 5 |
| CS5174GD8G | 功能描述:直流/直流開關(guān)調(diào)節(jié)器 1.5A High Efficiency Boost RoHS:否 制造商:International Rectifier 最大輸入電壓:21 V 開關(guān)頻率:1.5 MHz 輸出電壓:0.5 V to 0.86 V 輸出電流:4 A 輸出端數(shù)量: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFN 4 x 5 |
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