參數(shù)資料
型號: CS48DV2B-CQZR
廠商: Cirrus Logic Inc
文件頁數(shù): 24/26頁
文件大?。?/td> 0K
描述: IC DSP AUDIO 32BIT 2CH 48-LQFP
標(biāo)準(zhǔn)包裝: 2,000
系列: CS48DV2
類型: 定點(diǎn)
接口: I²C,SPI
時(shí)鐘速率: 150MHz
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.80V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP(7x7)
包裝: 帶卷 (TR)
CS48DV2B Data Sheet
32-bit Audio DSP for Dedicated Dolby Volume and Audistry by Dolby
DS875F2
Copyright 2009 Cirrus Logic
7
CONFIDENTIAL
CONFIDENTI
A
L
DRA
FT
DELP
HI
4. Hardware Functional Description
4.1 DSP Core
The CS48DV2B DSPs are single-core DSP with separate X and Y data and P code memory spaces.
The DSP core is a high-performance, 32-bit, user-programmable, fixed-point DSP that is capable of
performing two multiply-and-accumulate (MAC) operations per clock cycle. The DSP core has eight
72-bit accumulators, four X- and four Y-data registers, and 12 index registers.
The DSP core is coupled to a flexible DMA engine. The DMA engine can move data between
peripherals such as the serial control port (SCP), digital audio input (DAI) and digital audio output
(DAO), or any DSP core memory, all without the intervention of the DSP. The DMA engine off loads
data move instructions from the DSP core, leaving more MIPS available for signal processing
instructions.
CS48DV2B functionality is controlled by application codes that are stored in on-board ROM or
downloaded to the CS48DV2B from a host controller or external serial FLASH/EEPROM.
Users can develop their applications using DSP Composer to create the processing chain and then
compile the image into a series of commands that are sent to the CS48DV2B through the SCP. The
processing application can either load modules (matrix-processors, virtualizers, post-processors)
from the DSPs on-board ROM, or custom firmware can be downloaded through the SCP.
The CS48DV2B is suitable for a variety of audio post-processing applications such as automotive
head-ends, automotive amplifiers, and boom boxes.
4.1.1 DSP Memory
The DSP core has its own on-chip data and program RAM and ROM and does not require external
memory for post-processing applications.
The Y-RAM and P-RAM share a single block of memory that can be configured to make Y and P
equal in size, or more memory can be allocated for Y-RAM in 2kword blocks.
4.1.2 DMA Controller
The powerful 8-channel DMA controller can move data between 8 on-chip resources. Each resource
has its own arbiter: X, Y, and P RAMs/ROMs and the peripheral bus. Modulo and linear addressing
Table 2. Device and Firmware Selection Guide
Devices
Availability
Suggested Applications
Specific Features
CS48DV2B-CQZ
CS48DV2B-DQZ
In Production Now
Digital TV
Portable Audio
Docking Station
Portable DVD
Players
Multimedia PC
Speakers
Soundbars
Automotive
Entertainment
Systems
2.1 channels of audio
input and 2.1
channels of PCM
audio output.
512 FFT Window, 20-
Bands/Channel
Dolby Volume Native
Processing of the
following Fs:
32 kHz
44.1 kHz
48 kHz
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