參數(shù)資料
型號(hào): CS4815
廠(chǎng)商: Applied Micro Circuits Corp.
英文描述: OC-48/12/3 DW/FEC/PM and ASYNC Mapper Device with Strong FEC
中文描述: OC-48/12/3倉(cāng)庫(kù)/前向糾錯(cuò)/ PM和異步映射器設(shè)備具有強(qiáng)糾錯(cuò)
文件頁(yè)數(shù): 3/3頁(yè)
文件大?。?/td> 173K
代理商: CS4815
Empowering Intelligent Optical Networks
3
Product Brief
RUBICON-48
OC-48/12/3 DW/FEC/PM and ASYNC Mapper Device with Strong FEC
Part Number S4815PBI, Revision 2.2, May 2006
AMCC reserves the right to make changes to its products, its datasheets, or related documentation, without notice and warrants its products solely
pursuant to its terms and conditions of sale, only to substantially comply with the latest available datasheet. Please consult AMCC’s Terms and
Conditions of Sale for its warranties, and other terms, conditions, and limitations. AMCC may discontinue any semiconductor product or service
without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information is
current. AMCC does not assume any liability arising out of the application or use of any product or circuit described herein, neither does it convey
any license under its patent rights nor the rights of others. AMCC reserves the right to ship devices of higher grade in place of those of lower grade.
AMCC SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN
LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS.
AMCC is a registered Trademark of Applied Micro Circuits Corporation. Copyright 2004 Applied Micro Circuits Corporation.
215 Moffett Park Drive Sunnyvale, CA 94089 Tel: 408-542-8600 Fax: 408-542-8601 http://
www.amcc.com; for technical support, please call 800 840-6055 or email support@amcc.com
FORWARD ERROR CORRECTION CAPABILITY
Two FEC options are supported on the line side. The Rubicon-
48 can support standard RS(255,239) FEC compliant with
G.709, G.975, and compatible with the AMCC Hudson device.
The device can also support an enhanced FEC algorithm that
is applied using the same G.709 frame structure and rate as
the Hudson but providing more than 2 dB of additional coding
gain (*measured at a BER of 10
-15
). The Rubicon-48 device
will operate in a mode where both encoders and decoders are
working simultaneously, allowing for a single chip transponder
to operate between two networks with different gain character-
istics.
LEGACY COMPATIBILITY
As indicated above, the Rubicon-48 also supports operation in
the G.975 mode. In this mode, the G.709 overhead processing
can be inhibited and direct access to the non-framing bytes in
the overhead column is provided through the pins on the
device. The device operates in the 255,238 mapping mode
with no stuff columns inserted in the FEC payload.
There is also some limited backwards compatibility with the
S3062 device, AMCC’s first generation 2.5G FEC device. The
details of this backwards compatibility are outlined in the full
Rubicon-48 datasheet.
CONTROL INTERFACE
A general purpose 16-bit microprocessor interface is provided
for control and monitoring. The interface supports both Intel
and Motorola type microprocessors, and is capable of operat-
ing in either interrupt driven or polled-mode configurations.
APPLICATION DIAGRAMS
Figure 2: Multi-Protocol LAN Transport
Figure 2 shows the Rubicon-48 in an edge transponder appli-
cation. The client side signals are first mapped into virtually
concatenated SONET streams. The Volta-48 supports a vari-
ety of client side signals including GE, FC, 2XFC, DVB, Ficon
and Escon. In addition to the flexible client interface on the
Volta-48, the chip also supports fractional GE interfaces,
allowing a less than full rate GE client to be transported. The
Volta-48 also includes an independent wide range CDR on
each client input, allowing the chip to interface directly to the
client optics module. Once the client payloads have been
mapped into VC SONET streams, an STS48 signal is pre-
sented on the high speed or line side of the Volta-48.
The Rubicon-48 then monitors and wraps it’s client signal into
an ODU-1 payload and appends the GFEC or EFEC code
necessary for transport. The PHY interface is achieved with
the S3485 CMOS transciever.
Figure 2: Multi-Protocol LAN Transport
Rubicon-48
Volta-48
FC, or 2XFC
2.7GHz
S3485
10 Lanes of GE,
DVB, Escon, Ficon
1 x OTU1
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