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參數資料
| 型號： | CS4271-DZZR |
| 廠商： | Cirrus Logic Inc |
| 文件頁數： | 19/29頁 |
| 文件大小： | 0K |
| 描述： | IC CODEC 24BIT 114DB 28-TSSOP |
| 標準包裝： | 4,000 |
| 類型： | 立體聲音頻 |
| 數據接口： | 串行 |
| 分辨率（位）： | 24 b |
| ADC / DAC 數量： | 2 / 2 |
| 三角積分調變： | 是 |
| 動態(tài)范圍，標準 ADC / DAC (db)： | 108 / 114 |
| 電壓 - 電源，模擬： | 4.75 V ~ 5.25 V |
| 電壓 - 電源，數字： | 3.1 V ~ 5.25 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 28-TSSOP |
| 包裝： | 帶卷 (TR) |
| 配用： | 598-1003-ND - EVAL BOARD CS4271 STEREO CODEC |
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CS4271
26
DS592F1
5.1.4
16-Bit Auto-Dither
The CS4271 will auto-configure to output properly dithered 16-bit data when placed in Slave Mode and a 32x SCLK
to LRCK ratio is used. In this configuration, one half of a bit of dither is added to the LSB of the 16-bit word. This
applies only to the serial audio output of the ADC and will not affect DAC performance. See Figure 9.
5.1.5
Auto-Mute
The DAC output will mute following the reception of 8192 consecutive audio samples of static 0 or -1. A single sam-
ple of non-static data will release the mute. Detection and muting are done independently for each channel. The
common mode on the output will be retained and the Mute Control pin for that channel will go active during the mute
period.
5.1.6
High Pass Filter
The operational amplifiers in the input circuitry driving the CS4271 may generate a small DC offset into the ADC.
The CS4271 includes a high pass filter after the decimator to remove any DC offset which could result in recording
a DC level, possibly yielding "clicks" when switching between devices in a multichannel system.
In Stand-Alone Mode, the high pass filter continuously subtracts a measure of the DC offset from the output of the
decimation filter. This function cannot be disabled in Stand-Alone Mode.
5.1.7
Interpolation Filter
In Stand-Alone Mode, the fast roll-off interpolation filter is used.
Filter specifications can be found in Section 3. Plots of the data are contained in the “Appendix” on page 47.
5.1.8
Mode Selection & De-Emphasis
The sample rate, Fs, can be adjusted from 4 kHz to 200 kHz. In Stand-Alone Mode, the CS4271 must be set to the
proper mode via the mode pins, M1 and M0. De-emphasis, optimized for a 44.1 kHz sampling frequency, is avail-
able.
5.1.9
Serial Audio Interface Format Selection
Either I2S or left justified serial audio data format may be selected in Stand-Alone Mode. The selection will affect
both the input and output format. Placing a 10 k
pull-up to VL on the I2S/LJ pin will select the I2S format, while
placing a 10 k
pull-down to DGND on the I2S/LJ pin will select the left justified format.
Table 5. CS4271 Stand-Alone Mode Control
Mode 1
Mode 0
Mode
Sample Rate (Fs)
De-Emphasis
0
Single Speed Mode
4 kHz - 50 kHz
44.1 kHz
0
1
Single Speed Mode
4 kHz - 50 kHz
Off
1
0
Double Speed Mode
50 kHz - 100 kHz
Off
1
Quad Speed Mode
100 kHz - 200 kHz
Off
1 6 -B it W o rd
1 5
1 4
1 3
1 2
1 1
1 0
98
7654321
0
B it D ith e r
Figure 9. ADC 16-Bit Auto-Dither
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相關代理商/技術參數 |
參數描述 |
|---|---|
| CS4272 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:24-Bit, 192 kHz Stereo Audio CODEC |
| CS4272-CZZ | 功能描述:接口—CODEC Stereo Audio CODEC 114 dB 192 kHz RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| CS4272-CZZR | 功能描述:接口—CODEC IC 24Bit 192kHz 114dB Str Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| CS4272-DZZ | 功能描述:接口—CODEC Stereo Audio CODEC 114 dB 192 kHz RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| CS4272-DZZ | 制造商:Cirrus Logic 功能描述:Stereo CODEC IC |
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