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1
Features
V
CC
Gnd
COMP
OSC
Sense
V
REF
REF
UndV
Lockout
Internal
Bias
S
R
PWM
Current
Comparator
R
2 R
1V
AmError
-
+
2.50V
Set/
V
CC
Undervoltage Lock-out
34V
R
R
V
FB
V
CC
Pwr
V
OUT
Pwr Gnd
Oscillator
FToggle
R5.0 Volt
8.4V/7.6V
NOR
I
I
Optimized for Off-line Use
Temperature
Compensated Oscillator
50% Maximum Duty-cycle
Clamp
Low Start-up Current
(500μA max)
Pulse-by-pulse Current
Limiting
Undervoltage Active Pull
Down
Double Pulse Suppression
1% Trimmed Bandgap
Reference
High Current Totem Pole
Output
I
I
I
I
I
I
I
Package Options
C
Current Mode PWM Control Circuit
with 50% Max Duty Cycle
Description
CS3845B
Block Diagram
Absolute Maximum Ratings
Supply Voltage (I
CC
<30mA)..........................................................Self Limiting
Supply Voltage (Low Impedance Source)...................................................30V
Output Current...............................................................................................±1A
Output Energy (Capacitive Load) .................................................................5μJ
Analog Inputs (V
FB
, V
SENSE
)...........................................................-0.3V to 5.5V
Error Amp Output Sink Current...............................................................10mA
Lead Temperature Soldering
Wave Solder (through hole styles only)..........10 sec. max, 260°C peak
Reflow (SMD styles only)...........60 sec. max above 183°C, 230°C peak
1
COMP
2
3
4
V
FB
Sense
OSC
V
REF
V
CC
V
OUT
Gnd
8
7
6
5
8 Lead PDIP & SO
10
7
14
13
12
8
1
2
3
4
5
6
11
9
COMP
NC
V
FB
NC
Sense
NC
OSC
V
REF
NC
V
CC
V
CC
Pwr
V
OUT
Pwr Gnd
Gnd
14 Lead SO Narrow
The CS3845B provides all the neces-
sary features to implement off-line
fixed frequency current-mode control
with a minimum number of external
components.
The CS3845B incorporates a precision
temperature-controlled oscillator to
minimize variations in frequency. An
internal toggle flip-flop, which blanks
the output off every other clock cycle,
ensures that the duty-cycle never
exceeds 50%. The undervoltage lock-
out feature ensures that VREFis stabi-
lized within specification before the
output stage is enabled.
The CS3845B
has been optimized for lower start up
current (500μA max).
Other features include 1% trimmed
band gap reference, pulse-by-pulse
current limiting, and a high-current
totem pole output for driving capaci-
tive loads.
Rev. 11/19/98
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: info@cherry-semi.com
Web Site: www.cherry-semi.com
A
Company