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參數(shù)資料
| 型號： | CS18LV20483ZIR55 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | High Speec Super Low Power SRAM |
| 中文描述： | 高Speec超低功耗SRAM |
| 文件頁數(shù)： | 9/16頁 |
| 文件大小： | 757K |
| 代理商： | CS18LV20483ZIR55 |
High Speed Super Low Power SRAM
256K-Word By 8 Bit
CS18LV20483
SWITCHING WAVEFORMS (READ CYCLE)
9
Rev. 1.0
Chiplus reserves the right to change product or specification without notice.
NOTES:
1.
t
HZ
and t
OHZ
are defined as the outputs achieve the open circuit conditions and are not
referenced to output voltage levels.
2.
At any given temperature and voltage condition, tHZ(Max.) is less than tLZ(Min.) both
for a given device and from device to device interconnection.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CS18LV20483ZIR70 | High Speec Super Low Power SRAM |
| CS18LV20483ACC-70 | JT 18C 18#20 PIN WALL RECP |
| CS18LV20483ACIR55 | JT 22C 22#22D PIN WALL RECP |
| CS18LV20483ACIR70 | JT 22C 22#22D PIN PLUG |
| CS18LV20483ADI-55 | High Speec Super Low Power SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CS18LV20483ZIR70 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:High Speec Super Low Power SRAM |
| CS18LV40963DCR70 | 制造商:Chiplus Semiconductor 功能描述:512k~8bit 70ns 2.7V to 3.6V 32sTSOP Tray |
| CS18LV40965CCR55 | 制造商:Chiplus Semiconductor Corp 功能描述:Bulk |
| CS18LV40965FCR55 | 制造商:Chiplus Semiconductor Corp 功能描述:Bulk |
| CS18M | 制造商:CENTRAL 制造商全稱:Central Semiconductor Corp 功能描述:SILICON CONTROLLED RECTIFIER |
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