參數(shù)資料
型號: CS18LV20483ECR70
廠商: Electronic Theatre Controls, Inc.
英文描述: High Speec Super Low Power SRAM
中文描述: 高Speec超低功耗SRAM
文件頁數(shù): 12/16頁
文件大?。?/td> 757K
代理商: CS18LV20483ECR70
High Speed Super Low Power SRAM
256K-Word By 8 Bit
CS18LV20483
NOTES:
1. A write occurs during the overlap(t
WP
) of low /CE1, a high CE2 and low /WE. A write
begins when /CE1 goes low, CE2 going high and /WE goes low. A write ends at the
earliest transition when /CE1 goes high , CE2 goes high an /WE goes high. The t
WP
is
measured from the beginning of the write to the end of write.
2. t
CW
is measured from the /CE1 going low or CE2 going low to end of write.
3. t
AS
is measured from the address valid to the beginning of write.
4. t
WR
is measured from the end or write to the address change. T
WR
applied in case a
write ends as /CE1 or /WE going high or CE2 going low.
ORDER INFORMATION
12
Rev. 1.0
Chiplus reserves the right to change product or specification without notice.
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