參數(shù)資料
型號(hào)： CS18LV02565ZI-70
廠商： Electronic Theatre Controls, Inc.
元件分類： DRAM
英文描述： HIGH SPEED SUPER LOW POWER SRAM
中文描述： 超快速，低功耗SRAM
文件頁(yè)數(shù)： 6/14頁(yè)
文件大?。?/td> 294K
代理商： CS18LV02565ZI-70
High Speed Super Low Power SRAM
32K-Word By 8 Bit
CS18LV02565
DC ELECTRICAL CHARACTERISTICS
( TA =
0
Name
Parameter
6
Rev. 2.0
Chiplus reserves the right to change product or specification without notice.
o
~70
o
C, Vcc = 5.0V)
TYP
(1)
Test Condition
MIN
MAX Unit
V
IL
Guaranteed Input Low
Voltage
(2)
Vcc=5.0V
-0.5
1.5
V
V
IH
Guaranteed Input High
Voltage
(2)
Vcc=5.0V
2.5
Vcc+0.2
V
I
IL
Input Leakage Current
V
CC
=MAX, V
IN
=0 to V
CC
-1
1
uA
I
OL
Output Leakage Current
V
CC
=MAX, /CE=V
IN
, or
/OE=V
IN
, V
IO
=0V to V
CC
-1
1
uA
V
OL
V
OH
Output Low Voltage
V
CC
=MAX, I
OL
= 1mA
0.4
V
Output High Voltage
V
CC
=MIN, I
OH
= -1mA
2.2
V
I
CC
Operating Power Supply
Current
/CE=V
IL
, I
DQ
=0mA,
F=F
MAX
=1/ t
RC
20
mA
I
CCSB
TTL Standby Supply
/CE=V
IH
, I
DQ
=0mA,
1
mA
I
CCSB1
CMOS Standby Current
/CE
≧
V
CC
-0.2V, V
IN
≧
V
CC
-0.2V or V
IN
≦
0.2V,
1.0
4
uA
1.
Typical characteristics are at TA = 25
2.
These are absolute values with respect to device ground and all overshoots due to system or tester notice are included.
DATA RETENTION CHARACTERISTICS
( TA =
0
Name
Parameter
Test Condition
o
C.
o
~70
MIN TYP
(1)
MAX
o
C, Vcc = 5.0V
)
Unit
V
DR
V
CC
for Data Retention
/CE
≧
V
CC
-0.2V, V
IN
≧
V
CC
-0.2V or V
IN
≦
0.2V
1.5
V
I
CCDR
Data Retention Current
/CE
≧
V
CC
-0.2V, V
IN
≧
V
CC
-0.2V or V
IN
≦
0.2V
0.5
3
uA
T
CDR
Chip Deselect to Data
Retention Time
0
ns
t
R
Operation Recovery Time
Refer to
Retention Waveform
t
RC
(2)
ns
1. TA = 25
o
C.
2.
t
RC= .
Read Cycle Time.
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