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參數(shù)資料
| 型號： | CS1201QFI22 |
| 廠商： | Applied Micro Circuits Corp. |
| 英文描述： | STS-12c/STS-3c POS/ATM SONET MAPPER |
| 中文描述： | STS-12c/STS-3c POS機/ ATM的SONET的映射器 |
| 文件頁數(shù)： | 1/2頁 |
| 文件大小： | 49K |
| 代理商： | CS1201QFI22 |
Features
S1201 Block Diagram
General Description
CONGO
STS-12c/STS-3c POS/ATM SONET MAPPER
PRODUCT BRIEF
AMCC
Production Information
- The information contained in this
document is about a product in its fully tested and character-
ized phase. All features described herein are supported. Con-
tact AMCC for updates to this document and the latest product
status.
Part Number - S1201QFI22
Product Brief Revision 3.4 - February 2002
Datasheet Revision 3.1
Processes SONET/SDH STS-12c/(STM-4/AU-4-4c) or
STS-3c/STM-1 data streams with full duplex mapping of
ATM cells or packets (PPP or LAPS) into SONET/SDH
payloads.
Terminates & generates SONET/SDH section, line, & path
layers, with transport/section E1, E2, F1 and DCC over-
head interfaces in both transmit and receive directions.
Provides an 8-bit parallel line-side interface operating at
19.44/77.76 MHz, and a 16-bit Utopia Level 2 or
POS-PHY
TM
Level 2 compatible system-side interface at
25/50 MHz.
Generic 8-bit microprocessor interface for configuration,
control, and status monitoring.
Scrambling/descrambling (1+X
6
+X
7
) of SONET/SDH
frame.
Selectable self-synchronous scrambler implementing (X
43
+1) polynomial for ATM and HDLC.
Supports multiple devices sharing the same Utopia inter-
face when used in a multi-PHY configuration.
Provides an 8-bit General Purpose I/O (GPIO) register and
associated hardware interface pins.
Provides an IEEE 1149.1 JTAG (Boundary Scan) test port.
Provides internal loopback paths for diagnostics.
Implemented in 0.35um/3.3V CMOS process technology
Packaged in 208 pin PQFP.
The S1201 is a highly-integrated VLSI device that provides
full-duplex mapping of PPP/LAPS encapsulated packets or
ATM cells into STS-12c/AU-4-4c or STS-3c/AU-4 payloads.
The S1201 supports full-duplex processing of SONET/SDH
data streams with full section, line, and path overhead pro-
cessing. The device supports framing pattern, scram-
bling/descrambling, alarm signal insertion/detection, and bit
interleaved parity (B1/B2/B3) processing. Serial interfaces for
SONET/SDH TOH overhead bytes are also provided.
The S1201 provides a line-side interface that can operate at
622.08 Mb/s (8-bit bus at 77.76 MHz) or 155.52 Mb/s (8-bit
bus at 19.44 MHz). For ATM applications, a UTOPIA Level 2
system interface, operating at either 25 or 50 MHz is pro-
vided. For Packet-over-SONET applications, a POS-PHY
TM
Level 2 compatible interface is provided.
The S1201 is standards compliant with Bellcore GR-253, ITU
G.707, ANSI T1.105 -1995, IETF RFCs 1619/1661/1662/
2615 (PPP) and ITU-T COM 7-224-E/D307 (LAPS recom-
mendation) protocols.
ATM support includes insertion and extraction of ATM cells
into and out of the SONET/SDH SPE, scrambling/descram-
bling, header error control (HEC) detection and correction,
idle cell generation and filtering, and generation of perfor-
mance monitoring counts for TX, RX, ERR, dropped and idle
cells.
HDLC support includes framing, transparency processing,
optional 16/32 FCS processing, and self synchronous scram-
bling/descrambling (X
43
+1). It also supports a direct
flow-thru mode where the system data is passed directly to or
from the SPE.
U
T
TX_SYS_DAT[15:0]
TX_ADR[4:0]
TX_CLK
TX_PRTY
TX_ENB
TX_SOC(P)
TX_CLAV(PTPA)
TX_STPA
RX_SYS_DAT[15:0]
RX_ADR[4:0]
RX_CLK
RX_PRTY
RX_ENB
RX_SOC(P)
RX_CLAV(PRPA)
RX_RVAL
TX
CFIFO
CERX
FIFO
SCRAMBLE
DE-SCRAMBLE
POINTER
INTERPRET
POH
MONITOR
TOH EXTRACT
TOH
MONITOR
RX
FRAMER
L
TX
FRAMER
TOH INSERT
SPE/VC & POH
GENERATE
T
T
T
T
T
R
R
R
R
R
R
RX_MOD
RX_EOP
RX_ERR
TX_MOD
TX_EOP
TX_ERR
D
A
C
R
W
R
B
I
MICROPROCESSOR I/F
JTAG PORT
GPIO REG
T
T
T
T
T
G
TX_DATA[7:0]
TX_SONET_CLK
TX_FRAME_OUT
RX_DATA[7:0]
RX_SONET_CLK
RX_FRAME_IN
R
RX_LOS
R
R
R
T
R
A
T
T
TX ATM/HDLC
(PPP/LAPS)
PROC
RX ATM/HDLC
(PPP/LAPS)
CNTRS
(PPP/LAPS)
PROC
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CS1202 | STS-12 ATM/DS3 SONET MAPPER |
| CS1204 | CIT RELAY&SWITCH |
| CS1204AF160 | CIT RELAY&SWITCH |
| CS1204AF260 | CIT RELAY&SWITCH |
| CS1204F160 | CIT RELAY&SWITCH |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CS1201RU | 制造商:Hubbell Wiring Device-Kellems 功能描述:SWITCH, COM, SP, 15A 120/277V, RD, USA |
| CS1201W | 制造商:Hubbell Wiring Device-Kellems 功能描述:SWITCH, TOGGLE, SPST, 15A, 277V; Contact Configuration:SPST; Switch Operation:-; Contact Voltage AC Nom:277V; Contact Current Max:15A; Switch Terminals:Screw; Actuator Style:Toggle; Body Material:Thermoset Plastic; Circuitry:SPST ;RoHS Compliant: Yes |
| CS1201WU | 制造商:Hubbell Wiring Device-Kellems 功能描述:SWITCH, COM, SP, 15A 120/277V, WH, USA |
| CS1202 | 制造商:AMCC 制造商全稱:Applied Micro Circuits Corporation 功能描述:STS-12 ATM/DS3 SONET MAPPER |
| CS120-2A | 制造商:Leviton Manufacturing Co 功能描述: |
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