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參數(shù)資料
| 型號(hào)： | CS1112YDWFR24 |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | Connectors, Accessories; For Use With:MS3057A Circular Connector Cable Clamps; Accessory Type:0.312in Rubber Bushing |
| 中文描述： | 4.5 A BUF OR INV BASED PRPHL DRVR, PDSO24 |
| 封裝： | SOIC-24 |
| 文件頁數(shù)： | 1/12頁 |
| 文件大?。?/td> | 93K |
| 代理商： | CS1112YDWFR24 |
Semiconductor Components Industries, LLC, 2000
October, 2000 – Rev. 10
1
Publication Order Number:
CS1112/D
CS1112
Quad Power Output Driver
The CS1112 is a Power Output Driver. The IC incorporates four
protected DMOS low–side drivers designed to drive inductive and
resistive loads in an automotive environment. The outputs are
controlled by an 8–bit serial peripheral interface (SPI) or its associated
parallel input. Each output contains overcurrent protection, open load
detection, and inductive flyback clamps. The device is overvoltage
protected. Overcurrent and open load faults are reported over the SPI
port, and at the STATUS lead.
I/O Control
SPI communication is initiated by asserting CSB low. Data at the SI
lead is transferred on the rising edge of SCLK. The MSB is transferred
first. The outputs become active at the rising edge of CSB. Diagnostic
status bits are transferred out the SO lead at the falling edge of SCLK.
The SO lead is high impedance while CSB is high. An open drain
output, (STATUS) reports a fault (short to V
PWR
, GND, or open load)
has occurred at one or more of the outputs.
Protection
Each output independently detects shorts to V
PWR
while the output
is “on” and open load/short to ground while the output is “off”. The
fault register will be set if a fault occurs at the output. The fault register
will be reset if the fault condition is removed from the output. The
fault data is latched when CSB is asserted low.
If an overcurrent condition or short circuit to V
BATT
occurs, the
output goes into a low duty cycle mode for the duration of the fault.
The outputs are disabled during an overvoltage or undervoltage
condition.
Features
4.0 MHz Serial Input Bus
Parallel Input Control
1.0
DMOS Drivers (typ)
Power On Reset
Internal Flyback Clamps
Status Output
Fault Protection
–
46 V Peak Transient
–
Power Limiting
–
Undervoltage
–
Overvoltage
Fault Reporting
–
Open Load
–
Short Circuit
8 Internally Fused Leads
http://onsemi.com
A
WL, L
YY, Y
WW, W
= Assembly Location
= Wafer Lot
= Year
= Work Week
PIN CONNECTIONS AND
MARKING DIAGRAM
Device
Package
Shipping
ORDERING INFORMATION
CS1112YDWF24
SO–24L
31 Units/Rail
CS1112YDWFR24
SO–24L
1000 Tape & Reel
V
DD
V
PWR
OUT0
IN0
GND
GND
GND
GND
IN1
OUT1
SI
CSB
R
OSC
STATUS
OUT3
IN3
GND
GND
GND
IN2
OUT2
SO
SCLK
GND
SO–24L
DW SUFFIX
CASE 751E
1
24
C
A
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