INTEGRATED CIRCUITS D
參數(shù)資料
型號(hào): CPC5712UTR
廠商: IXYS Integrated Circuits Division
文件頁(yè)數(shù): 11/11頁(yè)
文件大?。?/td> 0K
描述: PHONE LINE MON W/DETECTOR 16QSOP
標(biāo)準(zhǔn)包裝: 1
功能: 電話線監(jiān)控器,帶檢測(cè)器(PLMD)
電路數(shù): 1
電源電壓: 3 V ~ 5.5 V
電流 - 電源: 1.72mA
功率(瓦特): 50mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOP
包裝: 標(biāo)準(zhǔn)包裝
包括: 固定電平極性檢測(cè)器,電平檢測(cè)器
產(chǎn)品目錄頁(yè)面: 2629 (CN2011-ZH PDF)
其它名稱: CLA303DKR
INTEGRATED CIRCUITS DIVISION
CPC5712
R02
www.ixysic.com
9
3.3.2 Verify Resistor Selection
Once the resistor values are chosen it is necessary to
back calculate the nominal detector thresholds.
To do this the following equations are provided for two
variables:
where R is the sum of the resistive interface network
and RREF is the sum of the resistor divider network on
the reference voltage output.
The following values are also needed to perform the
threshold calculations. They are:
V
REF = 1.5V
R
IN1 = RIN2 = 2 x 10M = 20M
R
DIFF = 806k
G=2.5 (Single ended gain of input amplifier)
which gives:
R = 40.806M
and
R
REF = 270.1k
The threshold equations are:
1.
2.
3.
4.
Using the selected standard 1% resistor values, and
back calculating to the threshold voltages produces
these results:
V
L1 = 3.00280V
V
H1 = 5.00467V
V
L2 = 11.9662V
V
H2 = 14.9690V
As can be seen, the error from using standard value
resistors is less than 0.1% for VL1 and VH1 and is less
than 0.3% for VL2 and VH2.
3.4 High Voltage Detection Designs
Designs that require higher detection levels greater
than approximately 17V will necessitate a different
voltage divider ratio to accommodate the operational
range of the CPC5712’s internal circuitry. Changes to
the input resistor divider network are restricted to the
high impedance resistors from the tip and ring leads to
the IN+ and IN- inputs. Changing the differential input
resistor value from 806k
is not recommended as this
will introduce offset errors. The degree of offset error
caused by changing this component’s value is not
measured and therefore not calculable.
The design procedure for higher voltage detect levels
is the same as presented above. Remember to begin
with the equations shown in Section 2.5 “Detector
updated value for the “A” term based on the new input
resistor values.
R
RIN1 RIN2 RDIFF
++
=
RREF
R1 R2 R3 R4 R5
++++
=
VL1
VREF R R1
GRDIFF RREF
----------------------------------------
=
VH1
VREF R R1 R2
+
GRDIFF RREF
-----------------------------------------------------
=
VL2
VREF R R1 R2 R3
++
GRDIFF RREF
------------------------------------------------------------------
=
VH2
VREF R R1 R2 R3 R4
+++
GRDIFF RREF
--------------------------------------------------------------------------------
=
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