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    • 您現(xiàn)在的位置:買賣IC網(wǎng) > PDF目錄379951 > COP8SGA844L8 (National Semiconductor Corporation) 8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART PDF資料下載
    參數(shù)資料
    型號: COP8SGA844L8
    廠商: National Semiconductor Corporation
    英文描述: 8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART
    中文描述: 8位的CMOS基于ROM和OTP微控制器具有8K到32K的內(nèi)存,2個比較器和USART
    文件頁數(shù): 36/62頁
    文件大?。?/td> 913K
    代理商: COP8SGA844L8
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    10.0 Interrupts
    (Continued)
    ample, if the Software Trap routine is located at 0310 Hex,
    then the vector location 0yFE and -0yFF should contain the
    data 03 and 10 Hex, respectively. When a Software Trap
    interrupt occurs and the VIS instruction is executed, the
    program jumps to the address specified in the vector table.
    The interrupt sources in the vector table are listed in order of
    rank, from highest to lowest priority. If two or more enabled
    and pending interrupts are detected at the same time, the
    one with the highest priority is serviced first. Upon return
    from the interrupt service routine, the next highest-level
    pending interrupt is serviced.
    If the VIS instruction is executed, but no interrupts are en-
    abled and pending, the lowest-priority interrupt vector is
    used, and a jump is made to the corresponding address in
    the vector table. This is an unusual occurrence, and may be
    the result of an error. It can legitimately result from a change
    in the enable bits or pending flags prior to the execution of
    the VIS instruction, such as executing a single cycle instruc-
    tion which clears an enable flag at the same time that the
    pending flag is set. It can also result, however, from inad-
    vertent execution of the VIS command outside of the context
    of an interrupt.
    The default VIS interrupt vector can be useful for applica-
    tions in which time critical interrupts can occur during the
    servicing of another interrupt. Rather than restoring the pro-
    gram context (A, B, X, etc.) and executing the RETI instruc-
    tion, an interrupt service routine can be terminated by return-
    ing to the VIS instruction. In this case, interrupts will be
    serviced in turn until no further interrupts are pending and
    the default VIS routine is started. After testing the GIE bit to
    ensure that execution is not erroneous, the routine should
    restore the program context and execute the RETI to return
    to the interrupted program.
    This technique can save up to fifty instruction cycles (t
    ), or
    more, (50μs at 10 MHz oscillator) of latency for pending
    interrupts with a penalty of fewer than ten instruction cycles
    if no further interrupts are pending.
    To ensure reliable operation, the user should always use the
    VIS instruction to determine the source of an interrupt. Al-
    though it is possible to poll the pending bits to detect the
    source of an interrupt, this practice is not recommended. The
    use of polling allows the standard arbitration ranking to be
    altered, but the reliability of the interrupt system is compro-
    mised. The polling routine must individually test the enable
    and pending bits of each maskable interrupt. If a Software
    Trap interrupt should occur, it will be serviced last, even
    though it should have the highest priority. Under certain
    conditions, a Software Trap could be triggered but not ser-
    viced, resulting in an inadvertent “l(fā)ocking out” of all
    maskable interrupts by the Software Trap pending flag.
    Problems such as this can be avoided by using VIS
    instruction.
    TABLE 6. Interrupt Vector Table
    Arbitration Ranking
    Source
    Description
    Vector Address
    (Note 17)
    (Hi-Low Byte)
    0yFE–0yFF
    0yFC–0yFD
    0yFA–0yFB
    0yF8–0yF9
    0yF6–0yF7
    0yF4–0yF5
    0yF2–0yF3
    0yF0–0yF1
    0yEE–0yEF
    0yEC–0yED
    0yEA–0yEB
    0yE8–0yE9
    0yE6–0yE7
    0yE4–0yE5
    0yE2–0yE3
    0yE0–0yE1
    (1) Highest
    (2)
    (3)
    (4)
    (5)
    (6)
    (7)
    (8)
    (9)
    (10)
    (11)
    (12)
    (13)
    (14)
    (15)
    (16) Lowest
    Software
    Reserved
    External
    Timer T0
    Timer T1
    Timer T1
    MICROWIRE/PLUS
    Reserved
    USART
    USART
    Timer T2
    Timer T2
    Timer T3
    Timer T3
    Port L/Wakeup
    Default VIS
    INTR Instruction
    G0
    Underflow
    T1A/Underflow
    T1B
    BUSY Low
    Receive
    Transmit
    T2A/Underflow
    T2B
    T2A/Underflow
    T3B
    Port L Edge
    Reserved
    Note 17:
    y is a variable which represents the VIS block. VIS and the vector table must be located in the same 256-byte block except if VIS is located at the last
    address of a block. In this case, the table must be in the next block.
    C
    www.national.com
    36
    相關(guān)PDF資料
    PDF描述
    COP8SGA844L9 LMH6702 1.7 GHz, Ultra Low Distortion, Wideband Op Amp; Package: SOIC NARROW; No of Pins: 8
    COP8SGA844M3 LMH6702 1.7 GHz, Ultra Low Distortion, Wideband Op Amp; Package: SOIC NARROW; No of Pins: 8
    COP8SGA844M6 LMH6702 1.7 GHz, Ultra Low Distortion, Wideband Op Amp; Package: SOT-23; No of Pins: 5
    COP8SGA844M7 LMH6702 1.7 GHz, Ultra Low Distortion, Wideband Op Amp; Package: SOT-23; No of Pins: 5
    COP8SGA844M8 8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART
    相關(guān)代理商/技術(shù)參數(shù)
    參數(shù)描述
    COP8SGA844L9 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART
    COP8SGA844M3 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART
    COP8SGA844M6 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART
    COP8SGA844M7 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART
    COP8SGA844M8 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART
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