<small id="ksvuv"><noframes id="ksvuv"></noframes></small>
  • <small id="ksvuv"><sup id="ksvuv"></sup></small>
  • <em id="ksvuv"><th id="ksvuv"><wbr id="ksvuv"></wbr></th></em>
    <nobr id="ksvuv"><fieldset id="ksvuv"></fieldset></nobr>
  • <ins id="ksvuv"><label id="ksvuv"></label></ins>
  • <wbr id="ksvuv"></wbr>
    <wbr id="ksvuv"></wbr>
    參數(shù)資料
    型號: COP8SGA640N6
    廠商: National Semiconductor Corporation
    英文描述: LMH6555 Low Distortion 1.2 GHz Differential Driver; Package: LLP; No of Pins: 16
    中文描述: 8位的CMOS基于ROM和OTP微控制器具有8K到32K的內(nèi)存,2個(gè)比較器和USART
    文件頁數(shù): 43/62頁
    文件大?。?/td> 913K
    代理商: COP8SGA640N6
    12.0 MICROWIRE/PLUS
    (Continued)
    arrangement with the internal clock source is called the
    Master
    mode
    of
    operation.
    MICROWIRE/PLUS arrangement with an external shift clock
    is called the Slave mode of operation.
    The CNTRL register is used to configure and control the
    MICROWIRE/PLUS mode. To use the MICROWIRE/PLUS,
    the MSEL bit in the CNTRL register is set to one. In the
    master mode, the SK clock rate is selected by the two bits,
    SL0 and SL1, in the CNTRL register. Table 10 details the
    different clock rates that may be selected.
    Similarly,
    operating
    the
    TABLE 10. MICROWIRE/PLUS
    Master Mode Clock Select
    SL1
    0
    0
    1
    SL0
    0
    1
    x
    SK Period
    2 x t
    C
    4 x t
    C
    8 x t
    C
    Where t
    C
    is the instruction cycle clock
    12.1 MICROWIRE/PLUS OPERATION
    Setting the BUSY bit in the PSW register causes the
    MICROWIRE/PLUS to start shifting the data. It gets reset
    when eight data bits have been shifted. The user may reset
    the BUSY bit by software to allow less than 8 bits to shift. If
    enabled, an interrupt is generated when eight data bits have
    been shifted. The device may enter the MICROWIRE/PLUS
    mode either as a Master or as a Slave. Figure 28shows how
    two microcontroller devices and several peripherals may be
    interconnected using the MICROWIRE/PLUS arrangements.
    WARNING
    The SIO register should only be loaded when the SK clock is
    in the idle phase. Loading the SIO register while the SK clock
    is in the active phase, will result in undefined data in the SIO
    register.
    Setting the BUSY flag when the input SK clock is in the
    active phase while in the MICROWIRE/PLUS is in the slave
    mode may cause the current SK clock for the SIO shift
    register to be narrow. For safety, the BUSY flag should only
    be set when the input SK clock is in the idle phase.
    12.1.1 MICROWIRE/PLUS Master Mode Operation
    In the MICROWIRE/PLUS Master mode of operation the
    shift clock (SK) is generated internally. The MICROWIRE
    Master always initiates all data exchanges. The MSEL bit in
    the CNTRL register must be set to enable the SO and SK
    functions onto the G Port. The SO and SK pins must also be
    selected as outputs by setting appropriate bits in the Port G
    configuration register. In the slave mode, the shift clock
    stops after 8 clock pulses. Table 11 summarizes the bit
    settings required for Master mode of operation.
    10131732
    FIGURE 28. MICROWIRE/PLUS Application
    C
    www.national.com
    43
    相關(guān)PDF資料
    PDF描述
    COP8SGA640N7 8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART
    COP8SGA640N8 LMH6555 Low Distortion 1.2 GHz Differential Driver; Package: LLP; No of Pins: 16
    COP8SGA640N9 LMH6559 High-Speed, Closed-Loop Buffer; Package: SOIC NARROW; No of Pins: 8
    COP8SGA640Q3 LMH6559 High-Speed, Closed-Loop Buffer; Package: SOIC NARROW; No of Pins: 8
    COP8SGA640Q6 LMH6559 High-Speed, Closed-Loop Buffer; Package: SOT-23; No of Pins: 5
    相關(guān)代理商/技術(shù)參數(shù)
    參數(shù)描述
    COP8SGA640N7 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART
    COP8SGA640N8 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART
    COP8SGA640N9 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART
    COP8SGA640Q3 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART
    COP8SGA640Q6 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory, Two Comparators and USART