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Memory Map
All RAM, ports and registers (except A and PC) are mapped
into data memory address space.
Address
Contents
COP820C Family
00 to 2F
On Chip RAM Bytes
30 to 7F
Unused RAM Address Space (Reads as all
Ones)
COP840C Family
00 to 6F
On Chip RAM Bytes
70 to 7F
Unused RAM Address Space (Reads as all
Ones)
COP820C and COP840C Families
80 to BF
Expansion Space for on Chip EERAM
C0 to CF
Expansion Space for I/O and Registers
D0 to DF
On Chip I/O and Registers
D0
Port L Data Register
D1
Port L Configuration Register
D2
Port L Input Pins (Read Only)
D3
Reserved for Port L
D4
Port G Data Register
D5
Port G Configuration Register
D6
Port G Input Pins (Read Only)
Address
Contents
COP820C and COP840C Families
D7
Port I Input Pins (Read Only)
D8–DB
Reserved for Port C
DC
Port D Data Register
DD–DF
Reserved for Port D
E0 to EF
On Chip Functions and Registers
E0–E7
Reserved for Future Parts
E8
Reserved
E9
MICROWIRE/PLUS Shift Register
EA
Timer Lower Byte
EB
Timer Upper Byte
EC
Timer Autoload Register Lower Byte
ED
Timer Autoload Register Upper Byte
EE
CNTRL Control Register
EF
PSW Register
F0 to FF
On Chip RAM Mapped as Registers
FC
X Register
FD
SP Register
FE
B Register
Reading unused memory locations below 7FH will return all
ones. Reading other unused memory locations will return
undefined data.
Instruction Set
REGISTER AND SYMBOL DEFINITIONS
Registers
A
8-bit Accumulator register
B
8-bit Address register
X
8-bit Address register
SP
8-bit Stack pointer register
PC
15-bit Program counter register
PU
upper 7 bits of PC
PL
lower 8 bits of PC
C
1-bit of PSW register for carry
HC
Half Carry
GIE 1-bit of PSW register for global interrupt enable
Symbols
[B]
Memory indirectly addressed by B register
[X]
Memory indirectly addressed by X register
Mem
Direct address memory or [B]
MemI Direct address memory or [B] or Immediate data
Imm
8-bit Immediate data
Reg
Register memory: addresses F0 to FF (Includes B, X
and SP)
Bit
Bit number (0 to 7)
←
Loaded with
Exchanged with
Instruction Set
ADD
add
A ← A + MemI
ADC
add with carry
A ← A+MemI+C,C ← Carry
HC ← Half Carry
SUBC
subtract with carry
A ← A + MemI +C, C ← Carry
HC ← Half Carry
AND
Logical AND
A ← A and MemI
OR
Logical OR
A ← A or MemI
XOR
Logical Exclusive-OR
A ← A xor MemI
IFEQ
IF equal
Compare A and MemI, Do next if A = MemI
IFGT
IF greater than
Compare A and MemI, Do next if A > MemI
IFBNE
IF B not equal
Do next if lower 4 bits of B
≠ Imm
DRSZ
Decrement Reg. ,skip if zero
Reg ← Reg 1, skip if Reg goes to 0
COP820C/COP840C
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