參數(shù)資料
型號(hào): COP313C
廠商: National Semiconductor Corporation
英文描述: Single-Chip CMOS Microcontrollers
中文描述: 單芯片的CMOS微控制器
文件頁數(shù): 14/16頁
文件大?。?/td> 223K
代理商: COP313C
Description of Selected Instructions
The following information is provided to assist the user in
understanding the operation of several unique instructions
and to provide notes useful to programmers in writing
COP413C programs.
XAS INSTRUCTION
XAS (Exchange A with SIO) exchanges the 4-bit contents of
the accumulator with the 4-bit contents of the SIO register.
The contents of SIO will contain serial-in/serial-out shift reg-
ister or binary counter data, depending on the value of the
EN register. An XAS instruction will also affect the SK out-
put. (See Functional Description, EN Register.) If SIO is se-
lected as a shift register, an XAS instruction must be per-
formed once every four instruction cycle times to effect a
continuous data stream.
JID INSTRUCTION
JID (Jump Indirect) is an indirect addressing instruction,
transferring program control to a new ROM location pointed
to indirectly by A and M. It loads the lower eight bits of the
ROM address register PC with the contents of ROM ad-
dressed by the 9-bit word, PC
8
, A, M. PC
8
is not affected by
this instruction.
Note:
JID uses two instruction cycles if executed, one if skipped.
LQID INSTRUCTION
LQID (Load Q Indirect) loads the 8-bit Q register with the
contents of ROM pointed to by the 9-bit word PC
8
, A, M.
LQID can be used for table look-up or code conversion such
as BCD to 7-segment. The LQID instruction ‘‘pushes’’ the
stack (PC
a
1
SA
SB) and replaces the least
significant eight bits of the PC as follows: A
PC
7:4
,
RAM(B)
PC
3:0
, leaving PC
8
unchanged. The ROM data
pointed to by the new address is fetched and loaded into
the Q latches. Next, the stack is ‘‘popped’’ (SB
SA
PC), restoring the saved value of the PC to continue se-
quential program execution. Since LQID pushes SA
SB, the previous contents of SB are lost.
Note:
LQID uses two instruction cycles if executed, one if skipped.
INSTRUCTION SET NOTES
a. The first word of a COP413C program (ROM address 0)
must be a CLRA (Clear A) instruction.
b. Although skipped instructions are not executed, one in-
struction cycle time is devoted to skipping each byte of
the skipped instruction. Thus all program paths take the
same number of cycle times whether instructions are
skipped or executed (except JID and LQID).
c. The ROM is organized into eight pages of 64 words each.
The program counter is a 9-bit binary counter, and will
count through page boundaries. If a JP, JSRP, JID, or
LQID instruction is located in the last word of a page, the
instruction operates as if it were in the next page. For
example: A JP located in the last word of a page will jump
to a location in the next page. Also, a LQID or JID located
in the last word in page 3 or 7 will access data in the next
group of four pages.
COPS Programming Manual
For detailed information on writing. COPS programs, the
COPS Programming Manual 424410284-001 provides an in-
depth discussion of the COPS architecture, instruction set
and general techniques of COPS programming. This manual
is written with the programmer in mind.
OPTION LISTDOSCILLATOR SELECTION
The oscillator option selected must be sent in with the
EPROM of ROM Code for masking into the COP413C. Se-
lect the appropriate option, make a photocopy of the table
and send it with the EPROM.
COP413C/COP313C
Option 1: Oscillator selection
e
0 Ceramic Resonator input frequency divided by 8.
CKO is oscillator output.
e
1 Single pin RC controlled oscillator divided by 4. CKO
is no connection.
Note:
The following option information is to be sent to Na-
tional along with the EPROM.
Option 1: Value
e
DDis Oscillator Selected.
14
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