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參數(shù)資料
| 型號： | CMX644AD5 |
| 廠商： | CML MICROSYSTEMS PLC |
| 元件分類： | 調(diào)制器/解調(diào)器 |
| 英文描述： | 1.2 kbps DATA, MODEM, PDSO24 |
| 封裝： | SSOP-24 |
| 文件頁數(shù)： | 11/34頁 |
| 文件大?。?/td> | 1174K |
| 代理商： | CMX644AD5 |
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RPM-Based Fan Controller with HW Thermal Shutdown
Datasheet
SMSC EMC2103
19
Revision 0.90 (08-19-08)
DATASHEET
Chapter 4 Communications
4.1
System Management Bus Interface Protocol
The EMC2103 communicates with a host controller, such as an SMSC SIO, through the SMBus. The
SMBus is a two-wire serial communication protocol between a computer host and its peripheral
devices. A detailed timing diagram is shown in Figure 4.1. Stretching of the SMCLK signal is supported,
however the EMC2103 will not stretch the clock signal.
The EMC2103 contains a single SMBus interface. The EMC2103 client interfaces are SMBus 2.0
compatible and support Send Byte, Read Byte, Receive Byte and the Alert Response Address as valid
protocols. These protocols are used as shown below.
All of the below protocols use the convention in Table 4.1.
4.2
Write Byte
The Write Byte is used to write one byte of data to the registers as shown below Table 4.2:
Figure 4.1 SMBus Timing Diagram
Table 4.1 Protocol Format
DATA SENT
TO DEVICE
DATA SENT TO
THE HOST
# of bits sent
Table 4.2 Write Byte Protocol
START
SLAVE
ADDRESS
WR
ACK
REGISTER
ADDRESS
ACK
REGISTER
DATA
ACK
STOP
0 -> 1
0101_110
0
0 -> 1
0
XXh
0
1 -> 0
SMDATA
SMCLK
TLOW
TRISE
THIGH
TFALL
TBUF
THD:STA
P
S
S - Start Condition
P - Stop Condition
THD:DAT
TSU:DAT
TSU:STA
THD:STA
P
TSU:STO
S
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