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參數(shù)資料
| 型號： | CMX644AD2 |
| 廠商： | CML MICROSYSTEMS PLC |
| 元件分類： | 調(diào)制器/解調(diào)器 |
| 英文描述： | 1.2 kbps DATA, MODEM, PDSO24 |
| 封裝： | SOIC-24 |
| 文件頁數(shù)： | 18/34頁 |
| 文件大?。?/td> | 1174K |
| 代理商： | CMX644AD2 |
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RPM-Based Fan Controller with HW Thermal Shutdown
Datasheet
SMSC EMC2103
25
Revision 0.90 (08-19-08)
DATASHEET
5.1.1
SHDN_SEL Pin
The EMC2103 has a ‘strappable’ input (SHDN_SEL) allowing for configuration of the hardware
Critical/Thermal Shutdown input channel. The pull-up resistor used on this pin identifies which
configuration setting is used as shown in Table 5.1.
.
Note 5.1
For the EMC2103-1, the decode for a 22k Ohm resistor on the SHDN_SEL pin will be to
use the External Diode 1 channel in Diode Mode (the same as the decode for a 6.8k Ohm
resistor) as the hardware shutdown device.
Note 5.2
Load from EEPROM enabled (EMC2103-4 only - see Section 4.9).
5.1.2
TRIP_SET Pin
The EMC2103’s TRIP_SET pin is an analog input to the Critical/Thermal Shutdown block which sets
the Thermal Shutdown temperature. The system designer creates a voltage level at the input through
a simple resistor connected to GND as shown in Figure 5.2. The value of this resistor is used to create
an input voltage on the TRIP_SET pin which is translated into a temperature ranging from 65°C to
127°C as shown in Table 5.2
APPLICATION NOTE: Current only flows when the TRIP_SET pin is being monitored. At all other times, the internal
reference voltage is removed and the TRIP_SET pin will be pulled down to ground.
APPLICATION NOTE: The TRIP_SET pin circuitry is designed to use a 1% resistor externally. Using a 1% resistor
will result in the Thermal / Critical Shutdown temperature being decoded correctly. If a 5%
resistor is used, then the Thermal / Critical Shutdown temperature may be decoded with as
much as ±1°C error.
Table 5.1 SHDN_SEL Pin Decode
PULL UP RESISTOR
MODE/SHUTDOWN
CHANNEL
EXTERNAL DIODE 1 CONFIG
EXTERNAL DIODE 2 CONFIG
< 4.7k Ohm
AMD CPU on
External Diode 1
Beta Compensation disabled
REC disabled
Beta and REC controls are locked
Beta Compensation enabled (auto)
REC enabled
Beta and REC controls are not locked
6.8k Ohm
2N3904 on External
Diode 1
Beta Compensation disabled
REC enabled
Beta and REC controls are locked
Beta Compensation enabled (auto)
REC enabled
Beta and REC controls are not locked
10k Ohm
Intel CPU on External
Diode 1
Beta Compensation enabled and set to
auto
REC enabled
Beta and REC controls are locked
Beta Compensation enabled (auto)
REC enabled
Beta and REC controls are not locked
15k Ohm
Internal Diode
See Note 5.2
Beta Compensation enabled (auto)
REC enabled
Beta and REC controls are locked
Beta Compensation enabled (auto)
REC enabled
Beta and REC controls are not locked
22k Ohm
Intel CPU on External
Diode 2 - see
Note 5.1 and
Beta Compensation disabled
REC enabled
Beta and REC controls are not locked
Beta Compensation enabled (auto)
REC enabled
Beta and REC controls are locked
> 33k Ohm
Intel CPU on External
Diode 1
See Note 5.2
Beta Compensation enabled (auto)
REC enabled
Beta and REC controls are locked
Beta Compensation enabled (auto)
REC enabled
Beta and REC controls are not locked
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