參數(shù)資料
型號: CMPWR100S
英文描述: Analog IC
中文描述: 模擬IC
文件頁數(shù): 1/10頁
文件大小: 119K
代理商: CMPWR100S
2000 California Micro Devices Corp. All rights reserved.
10/20/2000
1
CMPWR100
CALIFORNIA MICRO DEVICES
215 Topaz Street, Milpitas, California 95035 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com
200mA SmartOR
TM
Regulator with V
AUX
Switch
Features
Automatic detection of V
CC
input supply
Fully integrated low impedance switch (0.2
typ.)
Glitch-free output during supply transitions
200mA output maximum Load Current
Foldback current limiting
Built-in hysteresis during supply selection
Controller operates from either V
CC
or V
AUX
8-pin Narrow SOIC package
Product Description
The California Micro Devices’ SmartOR
TM
CMPWR100 is
a low dropout regulator that delivers up to 200mA of
load current at a fixed 3.3V output. An internal threshold
level (typically 4.1V) is used to prevent the regulator
from being operated below dropout voltage. The device
continuously monitors the input supply and will automati-
cally disable the regulator when V
falls below the
threshold level. When the regulator is disabled, a low
impedance fully integrated switch is enabled which
allows the output to be directly powered from an auxil-
iary 3.3V supply.
Applications
PCI adapter cards
Network Interface Cards (NICs)
Dual Power Systems
Systems with Standby Capabilities
C1430800
When V
is restored to a level above the select thresh-
old, the low impedance switch is disabled and the
regulator is once again enabled.
All the necessary control circuitry needed to provide a
smooth and automatic transition between the supplies
has been incorporated. This allows V
to be dynami-
cally switched without loss of output voltage.
A logic output signal, Drive, is active LOW whenever the
internal regulator is disabled.
V
CC
V
5V
V
AUX
GND
GND
DRIVE
V
OUT
V
3.3V
200mA
CMPWR100
V
AUX
3.3V
4μ7
+
+
C
IN
F
C
OUT
+
+
Pin Diagram
Typical Application Circuit
PIN DIAGRAM, APPLICATION CIRCUIT, AND BLOCK DIAGRAM
V
OUT
3.3V
200mA
V
3.3V
+
V
CC
+
DESELECT
4.1C
V
AUX
GND
GND
0.2
DRIVE
ENABLE
Simplified Block Diagram
1
2
3
4
V
CC
V
AUX
V
AUX
GND
8
7
6
5
DRIVE
V
OUT
V
OUT
N.C.
Top View
CMPWR100
8-Pin Plastic SOIC
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