參數(shù)資料
型號: CLC5632
廠商: National Semiconductor Corporation
英文描述: Dual, High Output, Programmable Gain Buffer
中文描述: 雙路,高輸出,可編程增益緩沖器
文件頁數(shù): 1/19頁
文件大?。?/td> 352K
代理商: CLC5632
CLC5632
Dual, High Output, Programmable Gain Buffer
General Description
The CLC5632 is a dual, low cost, high speed (130MHz)
buffer which features user programmable gains of +2, +1,
and 1V/V. The CLC5632 also has a new output stage that
delivers high output drive current (130mA), but consumes
minimal quiescent supply current (3.0mA/ch) from a single
5V supply. Its current feedback architecture, fabricated in an
advanced complementary bipolar process, maintains consis-
tent performance over a wide range of gains and signal
levels, and has a linear phase response up to one half of the
3dB frequency.
The CLC5632 offers 0.1dB gain flatness to 30MHz and
differential gain and phase errors of 0.08% and 0.02. These
features are ideal for professional and consumer video ap-
plications.
The CLC5632 offers superior dynamic performance with a
130MHz small-signal bandwidth, 410V/μs slew rate and
5.0ns rise/fall times (2V
). The combination of low quies-
cent power, high output current drive, and high speed per-
formance make the CLC5632 well suited for many battery
powered personal communication/computing systems. The
ability to drive low impedance, highly capacitive loads,
makes the CLC5632 ideal for single ended cable applica-
tions. It also drives low impedance loads with minimum
distortion. The CLC5632 will drive a 100
load with only
82/69dBc second/third harmonic distortion (A
= +2,
V
= 2V
, f = 1MHz). With a 25
load, and the same
conditions, it produces only 71/73dBc second/third har-
monic distortion. It is also optimized for driving high currents
into single-ended transformers and coils. When driving the
input of high resolution A/D converters, the CLC5632 pro-
vides excellent 86/96dBc second/third harmonic distortion
(A
= +2, V
OUT
= 2V
PP
, f = 1MHz, R
L
= 1k
) and fast
settling time.
Features
n
130mA output current
n
0.08%, 0.02 differential gain, phase
n
3.0mA/ch supply current
n
130MHz bandwidth (A
v
=+2)
n
86/96dBc HD2/HD3 (1MHz)
n
17ns settling to 0.05%
n
410V/μs slew rate
n
Stable for capacitive loads up to 1000pf
n
Single 5V to
±
5V supplies
Applications
n
Video line driver
n
Coaxial cable driver
n
Twisted pair driver
n
Transformer/coil driver
n
High capacitive load driver
n
Portable/battery powered applications
n
A/D driver
Connection Diagram
Maximum Output Voltage vs. R
L
DS015003-1
DS015003-3
Pinout
DIP & SOIC
December 2000
C
2000 National Semiconductor Corporation
DS015003
www.national.com
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