參數(shù)資料
    型號: CLA72000DC28
    英文描述: ASIC
    中文描述: 專用集成電路
    文件頁數(shù): 5/17頁
    文件大小: 243K
    代理商: CLA72000DC28
    MANUFACTURING FACILITY
    I
    Computer aided manufacturing
    I
    Digital testers with large pinout capacity
    I
    Vibration free for reliable manufacture
    The CLA70000 product is manufactured near Plymouth,
    England in the latest purpose built facility for sub-micron
    process geometries. The factory uses the latest automated
    equipment for 6 inch wafers and Computer Aided
    Manufacturing techniques to ensure production efficiency.
    Wafer fabrication is carried out in Class 10, or better, clean
    room conditions in a vibration free environment to assure the
    lowest possible defect level. In addition to the world class
    wafer facility there are excellent probe and final test areas
    equipped with the latest analog and digital testers capable of
    handling complex test vectors and large pinouts. This large
    investment shows GEC Plessey Semiconductors
    commitment to all the market areas needing state-of-the-art
    CMOS ASICS.
    CELL LIBRARY
    I
    Comprehensive range of cells
    I
    Specialized DSP and BIST sub-libraries
    I
    Compatible with Megacell and CLA60000
    A very comprehensive cell library is available for the
    CLA70000 series. It contains sub libraries which may be used
    in specific applications areas such as Digital Signal
    Processing (DSP) and Built In Self Test (BIST).
    More details on these specialized libraries can be found in
    applications notes or the design manual.
    The 1.4 micron (drawn) CMOS array (CLA60000) cell
    library may be converted to the equivalent cells on the
    CLA70000 to allow system upgrades. Equivalent cells are
    also available for the corresponding MVA70000 Megacell to
    enable an easy transition to a standard cell product to
    minimize silicon area or to add analog functions.
    CELL LIBRARY
    LOGIC ARRAY CELLS
    BUF
    ST1
    DELAY
    Buffer driver
    Schmitt trigger
    Delay cell
    2INV
    INV2
    INV4
    INV8
    Dual driver
    Inverter, dual drive
    Inverter, quad drive
    Inverter, octal drive
    NAND2
    ND3
    NAND3
    2NAND3
    NAND4
    NAND5
    NAND6
    NAND8
    2 input NAND gate
    3 input NAND gate
    3 input NAND gate + inverter
    Dual 3 input NAND gate
    4 input NAND gate
    5 input NAND gate
    6 input NAND gate
    8 input NAND gate
    NOR2
    NR3
    NOR3
    2NOR3
    NOR4
    NOR5
    NOR6
    NOR8
    2 input NOR gate
    3 input NOR gate
    3 input NOR gate + inverter
    Dual 3 input NOR gate
    4 input NOR gate
    5 input NOR gate
    6 input NOR gate
    8 input NOR gate
    A2O21
    O2A21
    2A2O21
    2O2A21
    2ANOR
    2ONAND
    2 input AND to 2 input NOR gate + inverter
    2 input OR to 2 input NAND gate + inverter
    Dual 2 input AND to 2 input NOR gate
    Dual 2 input OR to 2 input NAND gate
    2 input ANDs to 2 input NOR gate
    2 input ORs to 2 input NAND gate
    A2O31
    O2A31
    A3O21
    O3A21
    A4O21
    O4A21
    A2041
    O2A41
    3A2O31
    3O2A31
    O2A2O21
    2 input AND to 3 input NOR gate
    2 input OR to 3 NAND gate
    3 input AND to 2 input NOR gate
    3 input OR to 2 input NAND gate
    4-input ANDs to 2 input NOR gate
    4-input ORs to 2 input NAND gate
    2-input AND to 4 input NOR gate
    2-input ORs to 4 input NAND gate
    3 2-input ANDs to 3 input NOR gate
    3 2-input ORs to 3 input NAND gate
    2 input OR to 2 input AND to 2 input
    NOR gate
    2 input AND to 2 input OR to 2 input
    NAND gate
    A2O2A21
    EXOR
    EXNOR
    EXOR2
    EXNOR2
    EX2
    EXN2
    EXOR3
    EXNOR3
    EXPRIM
    Exclusive OR gate + NAND gate + inverter
    Exclusive NOR gate + NOR gate + inverter
    2 input exclusive OR gate
    2 input exclusive NOR gate
    Exclusive OR gate + inverter
    Exclusive NOR gate + inverter
    3 input exclusive OR gate
    3 input exclusive NOR gate
    2 input exclusive OR gate primitive
    HADD
    SUM
    SUM2
    CARRY
    CARRY2
    FADD
    BMF1
    BMF2
    Half adder + inverter
    Sum block
    Sum block
    Carry block + NOR gate
    Carry block + inverter
    Full adder + NOR gate
    Full adder 1
    Full adder 2
    MUX2TO1
    MUX4TO1
    MUX8TO1
    MUXI2TO1
    2 to 1 multiplexer
    4 to 1 multiplexer
    8 to 1 multiplexer
    2 to 1 inverting multiplexer
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