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參數(shù)資料
| 型號： | CL10K50SQC240-3 |
| 英文描述： | FPGA |
| 中文描述： | FPGA的 |
| 文件頁數(shù)： | 15/16頁 |
| 文件大?。?/td> | 178K |
| 代理商： | CL10K50SQC240-3 |
LIBERATOR CL10K30A
Page 8
Capacitance[4]
DC Electrical Specifications cont.
Symbol
Parameter
Conditions
Min
Max
Unit
CIN
Input Capacitance
VIN = 0 V, f = 1.0 MHz
8
pF
COUT
Output Capacitance
VOUT = 0 V, f = 1.0 MHz
8
pF
10K tbl 05B
DC Electrical Characteristics (over the operating range)
Symbol
Parameter
Conditions
Min
Typ[3]
Max
Unit
VIH
Input HIGH Voltage
Lower of
1.7 or 0.5
x VCCINT
5.75
V
VIL
Input LOW Voltage
-0.5
0.3 x VCCINT
V
3.3-V High-Level TTL Output
Voltage
IOH = -8 mA DC, VCCIO = 3.00 V
2.4
V
3.3-V High-Level CMOS
Output Voltage
IOH = -0.1 mA DC, VCCIO = 3.00 V
VCCIO-0.2
V
3.3-V High-Level PCI Output
Voltage
IOH = -0.5 mA DC, VCCIO = 3 to 3.60 V 0.9 x VCCIO
V
IOH = -0.1 mA DC, VCCIO = 2.30 V
2.1
V
IOH = -1 mA DC, VCCIO = 2.30 V
2.0
V
IOH = -2 mA DC, VCCIO = 2.30 V
1.7
V
3.3-V Low-Level TTL Output
Voltage
IOL = 9 mA DC, VCCIO = 3.00 V
0.45
V
3.3-V Low-Level CMOS
Output Voltage
IOL = 0.1 mA DC, VCCIO = 3.00 V
0.2
V
3.3-V Low-Level PCI Output
Voltage
IOL = 1.5 mA DC, VCCIO = 3 to 3.60 V
0.1 x VCCIO
V
IOL = 0.1 mA DC, VCCIO = 2.30 V
0.2
V
IOL = 1 mA DC, VCCIO = 2.30 V
0.4
V
IOL = 2 mA DC, VCCIO = 2.30 V
0.7
V
IIN
Input Leakage Current
VI = 5.3V to -0.3V
-10
10
A
IOZ
Output Leakage Current
VO = 5.3V to -0.3V
-10
10
A
ICC0
Standby Current
VI = GND, no load
0.3
10
mA
10KA tbl 04B
VOH
2.5-V High-Level Output
Voltage
VOL
2.5-V Low-Level Output
Voltage
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|---|---|
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| CL10K50STC144-1X | FPGA |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CL10K50SQI208-2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA |
| CL10K50STC144-1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA |
| CL10K50STC144-1X | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA |
| CL10K50STC144-2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA |
| CL10K50STC144-2X | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA |
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