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參數(shù)資料
| 型號： | CGS2536V |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 時鐘及定時 |
| 英文描述： | Commercial, Industrial Quad 1 to 4 Clock Drivers |
| 中文描述： | 2536 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 127K |
| 代理商： | CGS2536V |
TL/F/12325
C
C
September 1995
CGS2536V
Commercial Quad 1 to 4 Clock Drivers
CGS2536TV
Industrial Quad 1 to 4 Clock Drivers
General Description
These Clock Generation and Support clock drivers are spe-
cifically designed for driving memory arrays requiring large
fanouts while operating at high speeds.
This device meets the rise and fall time requirements of the
90 MHz and 100 MHz Pentium
TM
procrssors.
The CGS2536 I/O structures are CMOS. The outputs are
separated into two banks of eight. One bank consists of
divide by two outputs, the other, straight-through buffers.
Within each bank, half the outputs are inverting, the other
half non-inverting.
The CGS2536 specification guarantees part-to-part skew
variation.
Features
Y
Guaranteed:
D 1.0 ns rise and fall times while driving 12 inches of
50
X
microstrip terminated with 25 pF
D 350 ps pin-to-pin skew (t
OSLH
and t
OSHL
)
Y
650 ps part-to-part variation on positive or negative
transition
Y
Operates with either 3.3V or 5.0V supply
Y
Inputs 5V tolerant with V
CC
in 3.3V range
Y
Symmetric output current drive: 24 mA I
OH
/I
OL
Y
Industrial temperature of
b
40
§
C to
a
85
C
Y
Symmetric package orientation
Y
Large fanout for memory driving applications
Y
Guaranteed 2 kV ESD protection
Y
Implemented on National’s ABT family process
Y
28-pin PLCC for optimum skew performance
Connection Diagrams
Pin Assignment for 28-Pin PLCC
TL/F/12325–1
Truth Table
Input
Output
In 0
ABCD Out (0)
d
2
In 1
ABCD Out (1)
d
2
In 2
ABCD Out (2)
In 3
ABCD Out (3)
CGS2536
TL/F/12325–2
Pentium
TM
is a trademark of Intel Corporation.
C
1995 National Semiconductor Corporation
RRD-B30M105/Printed in U. S. A.
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