- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄26498 > CDS-1401MM (MURATA POWER SOLUTIONS INC) PDF資料下載
參數(shù)資料
| 型號(hào)： | CDS-1401MM |
| 廠商： | MURATA POWER SOLUTIONS INC |
| 元件分類： | 取樣保持放大器 |
| 中文描述： | SAMPLE AND HOLD AMPLIFIER, 0.35 us ACQUISITION TIME, CDIP24 |
| 封裝： | CERAMIC, DDIP-24 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 87K |
| 代理商： | CDS-1401MM |
1
OFFSET ADJUST V1
2
OFFSET ADJUST I1
3
ANALOG INPUT 1
4
ANALOG INPUT 2
5
ANALOG GROUND
6
S/H1 OUT
7
S/H1 ROUT
8
S/H2 SUMMING NODE
9
OFFSET ADJUST V2
10
OFFSET ADJUST I2
11
S/H1 COMMAND
12
S/H2 COMMAND
INPUT/OUTPUT CONNECTIONS
24
+15V ANALOG SUPPLY
23
ANALOG GROUND
22
V OUT
21
ANALOG GROUND
20
A/D CLOCK2
19
A/D CLOCK2
18
A/D CLOCK1
17
A/D CLOCK1
16
+5V DIGITAL SUPPLY
15
DIGITAL GROUND
14
ANALOG GROUND
13
–15V ANALOG SUPPLY
FEATURES
Use with 10 to 14-bit A/D converters
1.25 Megapixels/second minimum throughput (14 bits)
±10V input/output ranges, Gain = –1
Low noise, 200Vrms
Two independent S/H amplifiers
Gain matching between S/H's
Offset adjustments for each S/H
Four external A/D control lines
Small package, 24-pin ceramic DDIP
Low power, 700mW
Low cost
GENERAL DESCRIPTION
The CDS-1401 is an application-specific, correlated double
sampling (CDS) circuit designed for electronic-imaging
applications that employ CCD’s (charge coupled devices) as
their photodetector. The CDS-1401 has been optimized for
use in digital video applications that employ 10 to 14-bit A/D
converters. The low-noise CDS-1401 can accurately
determine each pixel’s true video signal level by sequentially
sampling the pixel’s offset signal and its video signal and
subtracting the two. The result is that the consequences of
residual charge, charge injection and low-frequency “kTC”
noise on the CCD’s output floating capacitor are effectively
eliminated. The CDS-1401 can also be used as a dual
sample-hold amplifier in a data acquisition system.
The CDS-1401 contains two sample-hold amplifiers and
appropriate support/control circuitry. Features include
independent offset-adjust capability for each S/H, adjustment
for matching gain between the two S/H’s, and four control
PIN
FUNCTION
PIN
FUNCTION
INNOVATION and EXCELLENCE
Figure 1. CDS-1401 Functional Block Diagram
lines for triggering the A/D converter used in conjunction with
the CDS-1401. The CDS circuit’s “ping-pong” timing
approach (the offset signal of the “n+1” pixel can be acquired
while the video output of the “nth” pixel is being converted)
guarantees a minimum throughput, in a 14-bit application, of
1.25MHz. In other words, the true video signal (minus offset)
will be available
(continued on page 4-5)
CDS-1401
14-Bit, Fast-Settling
Correlated Double Sampling Circuit
S/H 2
OFFSET ADJUST V1 1
OFFSET ADJUST I1 2
ANALOG INPUT 1
3
S/H 1
OFFSET ADJUST V2 9
OFFSET ADJUST I2 10
ANALOG INPUT 2
4
S/H1 COMMAND 11
S/H2 COMMAND 12
5, 14, 21, 23
ANALOG GROUND
24
+15V SUPPLY
16
+5V DIGITAL
SUPPLY
15
DIGITAL
GROUND
7
S/H1 ROUT
8
S/H2
SUMMING NODE
22 V OUT
18 A/D CLOCK 1
6
S/H1 OUT
OPTIONAL
17 A/D CLOCK 1
19 A/D CLOCK 2
20 A/D CLOCK 2
CH = 100pF
1k
100
100k
1k
CH = 100pF
100k
1k
900
1k
13
–15V SUPPLY
–
+
–
+
DATEL, Inc., 11 Cabot Boulevard, Mansfield, MA 02048-1151 (U.S.A.)
Tel: (508) 339-3000 Fax: (508) 339-6356 For immediate assistance (800) 233-2765
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CDS-1402MC | |
| CFUKF455KB4X-R0 | |
| CFUKF455KD1X-R0 | |
| CFULB455KB2A-B0 | |
| CFULB455KF4A-B0 | |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CDS1402 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:14-Bit, Very Fast Settling Correlated Double Sampling Circuit |
| CDS-1402 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:14-Bit, Very Fast Settling Correlated Double Sampling Circuit |
| CDS-1402MC | 制造商:Murata Power Solutions 功能描述:Correlated Double Sampler (Cds) 24-Pin CDDIP |
| CDS-1402MM | 制造商:Murata Power Solutions 功能描述:Correlated Double Sampler (Cds) 24-Pin CDDIP |
| CDS14N | 功能描述:SOCKET,1/4" DRIVE,7MM,6PT 制造商:apex tool group 系列:* 零件狀態(tài):在售 標(biāo)準(zhǔn)包裝:1 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。