參數(shù)資料
型號： CDB6403
廠商： Cirrus Logic, Inc.
元件分類： Codec
英文描述： Echo-Cancelling Codec
中文描述： 回聲取消編解碼器
文件頁數(shù)： 1/54頁
文件大?。?/td> 761K
代理商： CDB6403
Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
1
Copyright
Cirrus Logic, Inc. 1997
(All Rights Reserved)
Cirrus Logic, Inc.
Crystal Semiconductor Products Division
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.crystal.com
CS6403
Echo-Cancelling Codec
Features
l
Applicable in:
-
Digital-Cellular Hands-Free Phones
-
Analog-Cellular Hands-Free Phones
-
Office Speaker Phones
-
Desktop & Video Teleconferencing
l
Echo Cancellation
-
Up to 60 dB ERLE
-
512 Tap (64 ms at 8 kHz sampling rate)
-
Split Mode For Two Echo Cancellers
l
Serial Data/Control Interface
l
On-Chip Delta-Sigma Codec
-
< 1% THD, 8
Load On Output
-
> 70 dB S/(N+D) on Input
-
300-3600 Hz Bandwidth (8 kHz sampling rate)
-
Volume Control
-
Microphone Preamp
l
Automatic Gain Control (AGC)
l
No Training Signals Generated
Description
The CS6403 is an application-specific digital signal pro-
cessor optimized for network and acoustic echo
cancellation applications. A high-quality codec is inte-
grated with the processor to provide a complete, low-
cost echo-cancellation solution.
The CS6403 is a fully independent processor that re-
quires no signal processing support to implement its
cancellation functions. Volume control, AGC, and sleep
functions are also provided.
The on-chip ADC and DAC employ over-sampling tech-
nology, which eliminates the need for complex external
anti-aliasing and reconstruction filters, further reducing
system cost.
The CS6403 has a serial interface that is compatible with
most DSPs and PCM codecs. Clock and sync lines con-
trol the transfer of serial data via the separate serial data-
in and data-out pins. Both 16-bit audio data and con-
trol/status information may be multiplexed on this serial
channel using a steering bit.
ORDERING INFORMATION
CS6403-IQ
CS6403-IL
CDB6403
-40° to +85° C 44-pin TQFP
-40° to +85° C 44-pin PLCC
Evaluation Board
I
RESET
DVDD0 1
CONFIG
GPIN0
GPIN1
GPIN2
RESERVED0 6
CLKIN CLKOUTSCLK_RATE0
PVDD
SPKROUTP
SPKROUTN
PGND0
PGND1
MICIN
VCM
VREF
SCLK_RATE1
PLL + Clock Manager
CLK_SEL
NC
GPIN3
GPOUT0
GPOUT1
SFRAME
SMASTER
UALAW
SSYNC
SCLK
SDO_1
SDI_A
SYNCOUT
AVDD
DGND0 1
S
AGND0 1
DSP
Control
Status
A
G
C
High
Pass
Control
Nonlinear
Echo
Control
Volume
Control
Echo Cancellers
Nonlinear
Echo
Control
High
Pass
A
T
T
E
N
A
T
T
E
N
D/A
A/D
26 dB
Analog I/O
MAR ‘96
DS192PP7
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