- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379826 > CD74HCT193M (Texas Instruments, Inc.) LM8333 Mobile I/O Companion Supporting Key-Scan, I/O Expansion, PWM, and ACCESS.bus Host Interface; Package: LLP; No of Pins: 32 PDF資料下載
參數(shù)資料
| 型號(hào)： | CD74HCT193M |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | LM8333 Mobile I/O Companion Supporting Key-Scan, I/O Expansion, PWM, and ACCESS.bus Host Interface; Package: LLP; No of Pins: 32 |
| 中文描述： | 高速CMOS邏輯預(yù)置同步4位向上/向下計(jì)數(shù)器 |
| 文件頁(yè)數(shù)： | 1/11頁(yè) |
| 文件大小： | 67K |
| 代理商： | CD74HCT193M |
1
Data sheet acquired from Harris Semiconductor
SCHS163
Features
Synchronous Counting and Asynchronous
Loading
Two Outputs for N-Bit Cascading
Look-Ahead Carry for High-Speed Counting
Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
Wide Operating Temperature Range . . . -55
o
C to 125
o
C
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL
Logic ICs
HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
≤
1
μ
A at V
OL
, V
OH
Pinout
CD74HC192, CD74HC193, CD74HCT193
(PDIP, SOIC)
TOP VIEW
Description
The Harris CD74HC192, CD74HC193 and CD74HCT193 are
asynchronously
presettable
Up/Down synchronous counters, respectively.
BCD
Decade
and
Binary
Presetting the counter to the number on the preset data inputs
(P0-P3) is accomplished by a LOW asynchronous parallel
load input (PL). The counter is incremented on the low-to-high
transition of the Clock-Up input (and a high level on the Clock-
Down input) and decremented on the low to high transition of
the Clock-Down input (and a high level on the Clock-up input).
A high level on the MR input overrides any other input to clear
the counter to its zero state. The Terminal Count up (carry)
goes low half a clock period before the zero count is reached
and returns to a high level at the zero count. The Terminal
Count Down (borrow) in the count down mode likewise goes
low half a clock period before the maximum count (9 in the
192 and 15 in the 193) and returns to high at the maximum
count. Cascading is effected by connecting the carry and
borrow outputs of a less significant counter to the Clock-Up
and CLock-Down inputs, respectively, of the next most
significant counter.
If a decade counter is present to an illegal state or assumes
an illegal state when power is applied, it will return to the
normal sequence in one count as shown in state diagram.
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
P1
Q1
Q0
CPD
CPU
Q2
GND
Q3
V
CC
MR
TCD
TCU
PL
P2
P3
P0
Ordering Information
PART NUMBER
TEMP.RANGE
(
o
C)
PACKAGE
PKG.
NO.
CD74HC192E
-55 to 125
16 Ld PDIP
E16.3
CD74HC193E
-55 to 125
16 Ld PDIP
E16.3
CD74HCT193E
-55 to 125
16 Ld PDIP
E16.3
CD74HCT193M
-55 to 125
16 Ld SOIC
M16.15
NOTES:
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
2. Waferordieforthispartnumberisavailablewhichmeetsallelec-
trical specifications. Please contact your local sales office or
Harris customer service for ordering information.
September 1997
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
Harris Corporation 1997
File Number
1674.1
CD74HC192, CD74HC193,
CD74HCT193
High Speed CMOS Logic
Presettable Synchronous 4-Bit Up/Down Counters
[ /Title
(CD74
HC192
,
CD74
HC193
,
CD74
HCT19
3)
/Sub-
ject
(High
Speed
CMOS
Logic
Preset-
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CD74HCT242 | High Speed CMOS Logic Quad-Bus Transceiver with Three-State Outputs |
| CD74HCT356M96 | High-Speed CMOS Logic 8-Input Multiplexer/Register, Three-State |
| CD74HCT366 | LM95241 Dual Remote Diode Temperature Sensor with SMBus Interface and TruTherm™ Technology (65nm/90nm); Package: MINI SOIC; No of Pins: 8 |
| CD74HCT4050MT | High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting |
| CD74HCT4052SM | High Speed CMOS Logic Analog Multiplexers/Demultiplexers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CD74HCT194E | 功能描述:計(jì)數(shù)器移位寄存器 High Speed CMOS 4-Bit Shift Register RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| CD74HCT194EE4 | 功能描述:計(jì)數(shù)器移位寄存器 High Speed CMOS 4-Bit Shift Register RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| CD74HCT195E | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CD74HCT20E | 功能描述:邏輯門 Hi-Speed CMOS Logic Dual 4-Inp NAND Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| CD74HCT20EE4 | 功能描述:邏輯門 Hi-Speed CMOS Logic Dual 4-Inp NAND Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。