參數(shù)資料
型號： CD74HC273SM
廠商： Texas Instruments, Inc.
英文描述： High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset
中文描述： 高速CMOS邏輯與復(fù)位八路D類觸發(fā)器
文件頁數(shù)： 1/13頁
文件大?。?/td> 295K
代理商： CD74HC273SM
1
Data sheet acquired from Harris Semiconductor
SCHS174B
Features
Common Clock and Asynchronous Master Reset
Positive Edge Triggering
Buffered Inputs
Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
Wide Operating Temperature Range . . . -55
o
C to 125
o
C
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL
Logic ICs
HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
≤
1
μ
A at V
OL
, V
OH
Description
The ’HC273 and ’HCT273 high speed octal D-Type flip-flops
with a direct clear input are manufactured with silicon-gate
CMOS technology. They possess the low power consumption
of standard CMOS integrated circuits.
Information at the D inputis transferred to the Q outputs on
the positive-going edge of the clock pulse. All eight flip-flops
are controlled by a common clock (CP) and a common reset
(MR). Resetting is accomplished by a low voltage level
independent of the clock. All eight Q outputs are reset to a
logic 0.
Ordering Information
Pinout
CD54HC273, CD54HCT273
(CERDIP)
CD74HC273, CD74HCT273
(PDIP, SOIC)
TOP VIEW
PART NUMBER
TEMP. RANGE (
o
C)
PACKAGE
CD54HC273F3A
-55 to 125
20 Ld CERDIP
CD74HC273E
-55 to 125
20 Ld PDIP
CD74HC273M
-55 to 125
20 Ld SOIC
CD74HC273M96
-55 to 125
20 Ld SOIC
CD54HCT273F3A
-55 to 125
20 Ld CERDIP
CD74HCT273E
-55 to 125
20 Ld PDIP
CD74HCT273M
-55 to 125
20 Ld SOIC
CD74HCT273M96
-55 to 125
20 Ld SOIC
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel.
11
12
13
14
15
16
17
18
20
19
10
9
8
7
6
5
4
3
2
1
MR
Q0
D0
D1
Q1
Q2
D3
D2
Q3
GND
V
CC
Q7
D7
D6
Q6
Q5
D5
D4
Q4
CP
February 1998 - Revised May 2003
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
2003, Texas Instruments Incorporated
CD54HC273, CD74HC273,
CD54HCT273, CD74HCT273
High-Speed CMOS Logic
Octal D-Type Flip-Flop with Reset
[ /Title
(CD74
HC273
,
CD74
HCT27
3)
/Sub-
ject
(High
Speed
CMOS
Logic
Octal
D-
Type
Flip-
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