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參數(shù)資料
| 型號(hào)： | CD4076BMS |
| 廠商： | Intersil Corporation |
| 英文描述： | CMOS 4 -Bit D-Type Registers(CMOS 4位 D寄存器) |
| 中文描述： | 的CMOS 4位D型寄存器（?的CMOS 4位寄存器） |
| 文件頁(yè)數(shù)： | 1/9頁(yè) |
| 文件大?。?/td> | 78K |
| 代理商： | CD4076BMS |
7-1029
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright Intersil Corporation 1999
CD4076BMS
CMOS 4 -Bit D-Type Registers
Pinout
CD4076BMS
TOP VIEW
Functional Diagram
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
M
N
Q1
Q2
Q3
Q4
VSS
CLOCK
VDD
DATA 1
DATA 2
DATA 3
DATA 4
G2
G1
RESET
DATA
INPUT
DISABLE
OUTPUT
DISABLE
4D - TYPE
FLIP-FLOPS
WITH
AND-OR
LOGIC
CLOCK
RESET
7
15
G1
G2
M
N
9
10
1
2
D1
D2
D3
D4
14
13
12
11
Q1
Q2
Q3
Q4
3
4
5
6
VSS = 8
VDD = 16
DATA INPUT
DISABLE
OUTPUT
DISABLE
Features
High Voltage Type (20V Rating)
Three State Outputs
Input Disabled Without Gating the Clock
Gated Output Control Lines for Enabling or Disabling
the Outputs
Standardized Symmetrical Output Characteristics
100% Tested for Quiescent Current at 20V
Maximum Input Current of 1
μ
A at 18V Over Full Pack-
age Temperature Range; 100nA at 18V and +25
o
C
Noise Margin (Over Full Package/Temperature Range)
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
5V, 10V and 15V Parametric Ratings
Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
Description
CD4076BMS types are four-bit registers consisting of D-type
flip-flops that feature three-state outputs. Data Disable inputs
are provided to control the entry of data into the flip-flops.
When both Data Disable inputs are low, data at the D inputs
are loaded into their respective flip-flops on the next positive
transition of the clock input. Output Disable inputs are also
provided. When the Output Disable inputs are both low, the
normal logic states of the four outputs are available to the
load. The outputs are disabled independently of the clock by
a high logic level at either Output Disable input, and present
a high impedance.
The CD4076BMS is supplied in these 16 lead outline pack-
ages:
Braze Seal DIP
H4T
Frit Seal DIP
H1E
Ceramic Flatpack
H6W
December 1992
File Number
3325
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參數(shù)描述 |
|---|---|
| CD4076BMT | 功能描述:觸發(fā)器 CMOS 4B D-Type Reg RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| CD4076BMTE4 | 功能描述:觸發(fā)器 CMOS 4B D-Type Reg RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| CD4076BMTG4 | 功能描述:觸發(fā)器 CMOS 4B D-Type Reg RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| CD4076BNSR | 功能描述:觸發(fā)器 CMOS 4B D-Type Reg RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| CD4076BNSRE4 | 功能描述:觸發(fā)器 CMOS 4B D-Type Reg RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
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