參數(shù)資料
型號(hào): CD4053BPW
廠商: Texas Instruments, Inc.
英文描述: CMOS Analog Multiplexers/Demultiplexers with Logic Level Conversion
中文描述: CMOS模擬多路復(fù)用器/有邏輯電平轉(zhuǎn)換復(fù)用器
文件頁(yè)數(shù): 18/20頁(yè)
文件大?。?/td> 430K
代理商: CD4053BPW
7
Total Harmonic Distortion, THD
2 (Note 3)
5
10
0.3
%
3 (Note 3)
10
0.2
%
5 (Note 3)
15
0.12
%
VEE = VSS, fIS = 1kHz Sine Wave
%
-40dB Feedthrough Frequency
(All Channels OFF)
5 (Note 3)
10
1
VOS at Common OUT/IN
CD4053
8
MHz
VEE = VSS,
CD4052
10
MHz
CD4051
12
MHz
VOS at Any Channel
8
MHz
-40dB Signal Crosstalk
Frequency
5 (Note 3)
10
1
Between Any 2 Channels
3
MHz
VEE = VSS,
Between Sections,
CD4052 Only
Measured on Common
6
MHz
Measured on Any Chan-
nel
10
MHz
Between Any Two
Sections, CD4053
Only
In Pin 2, Out Pin 14
2.5
MHz
In Pin 15, Out Pin 14
6
MHz
Address-or-Inhibit-to-Signal
Crosstalk
-10
10
(Note 4)
65
mVPEAK
VEE =0,VSS =0,tr,tf = 20ns, VCC
= VDD - VSS (Square Wave)
65
mVPEAK
NOTES:
3. Peak-to-Peak voltage symmetrical about
4. Both ends of channel.
Typical Performance Curves
FIGURE 1. CHANNEL ON RESISTANCE vs INPUT SIGNAL
VOLTAGE (ALL TYPES)
FIGURE 2. CHANNEL ON RESISTANCE vs INPUT SIGNAL
VOLTAGE (ALL TYPES)
Electrical Specications
PARAMETER
TEST CONDITIONS
LIMITS
UNITS
VIS (V)
VDD (V)
RL (k)
TYP
20Log
V
OS
V
IS
------------
40dB
=
20Log
V
OS
V
IS
------------
40dB
=
V
DD
V
EE
2
-----------------------------
-4
-3
-2
-1
0
1
2
3
4
0
100
200
300
400
500
600
VIS, INPUT SIGNAL VOLTAGE (V)
r ON
,CHANNEL
ON
RESIST
ANCE
(
)
TA = 125
oC
TA = -55
oC
TA = 25
oC
VDD - VEE = 5V
5
-10
-7.5
-5
-2.5
0
2.5
5
7.5
10
0
50
100
150
200
250
300
VIS, INPUT SIGNAL VOLTAGE (V)
r ON
,CHANNEL
ON
RESIST
ANCE
(
)
TA = 125
oC
TA = 25
oC
TA = -55
oC
VDD - VEE = 10V
CD4051B, CD4052B, CD4053B
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