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參數(shù)資料
| 型號： | CD4044BC |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Quad 3-STATE NAND R/S Latches(四3態(tài)輸入與非邏輯R/S緩沖器) |
| 中文描述： | 四三態(tài)的NAND的R / S鎖存器（四三態(tài)輸入與非邏輯的R / S緩沖器） |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 68K |
| 代理商： | CD4044BC |
October 1987
Revised January 1999
C
1999 Fairchild Semiconductor Corporation
DS005967.prf
www.fairchildsemi.com
CD4043BC CD4044BC
Quad 3-STATE NOR R/S Latches
Quad 3-STATE NAND R/S Latches
General Description
The CD4043BC are quad cross-couple 3-STATE CMOS
NOR latches, and the CD4044BC are quad cross-couple 3-
STATE CMOS NAND latches. Each latch has a separate Q
output and individual SET and RESET inputs. There is a
common 3-STATE ENABLE input for all four latches. A
logic “1” on the ENABLE input connects the latch states to
the Q outputs. A logic “0” on the ENABLE input discon-
nects the latch states from the Q outputs resulting in an
open circuit condition on the Q output. The 3-STATE fea-
ture allows common bussing of the outputs.
Features
I
Wide supply voltage range:
I
Low power:
I
High noise immunity:
3V to 15V
100 nW (typ.)
0.45 V
DD
(typ.)
I
Separate SET and RESET inputs for each latch
I
NOR and NAND configuration
I
3-STATE output with common output enable
Applications
Multiple bus storage
Strobed register
Four bits of independent storage with output enable
General digital logic
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
Pin Assignments for DIP, SOIC and SOP
CD4043BC
Top View
Pin Assignments for DIP and SOIC
CD4044BC
Top View
Order Number
CD4043BCM
CD4043BCN
CD4044BCM
CD4044BCSJ
CD4044BCN
Package Number
M16A
N16E
M16A
M16D
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CD4044BPW | Single 100Mbps Digital Isolator with Enable 8-SOIC -40 to 125 |
| CD4044BDWR | Single 100Mbps Digital Isolator 8-SOIC -40 to 125 |
| CD4043BPW | CMOS QUAD 3-STATE R/S LATCHES |
| CD4044 | CMOS QUAD 3-STATE R/S LATCHES |
| CD4044BC | Quad TRI-STATE NOR(NAND) R/S Latches |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CD4044BCM | 功能描述:閉鎖 Qd 3-STATE NAND Latc RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| CD4044BCMX | 功能描述:閉鎖 RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| CD4044BCN | 功能描述:閉鎖 Qd 3-STATE NAND Latc RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| CD4044BD | 功能描述:閉鎖 CMOS Quad NAND R/S RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| CD4044BD | 制造商:Texas Instruments 功能描述:Latch Logic IC 制造商:Texas Instruments 功能描述:IC, QUAD NAND R/S-LATCH, 3-STATE, SOIC16 |
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