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參數(shù)資料
| 型號： | CD4029BC |
| 廠商： | National Semiconductor Corporation |
| 元件分類： | 通用總線功能 |
| 英文描述： | Presettable Binary/Decade Up/Down Counter(可預(yù)置的二進(jìn)制/十進(jìn)制可逆計(jì)數(shù)器) |
| 中文描述： | 可預(yù)置二進(jìn)制/十年加/減計(jì)數(shù)器（可預(yù)置的二進(jìn)制/十進(jìn)制可逆計(jì)數(shù)器） |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 164K |
| 代理商： | CD4029BC |
TL/F/5960
C
February 1988
CD4029BM/CD4029BC Presettable
Binary/Decade Up/Down Counter
General Description
The CD4029BM/CD4029BC is a presettable up/down
counter which counts in either binary or decade mode de-
pending on the voltage level applied at binary/decade input.
When binary/decade is at logical ‘‘1’’, the counter counts in
binary, otherwise it counts in decade. Similarly, the counter
counts up when the up/down input is at logical ‘‘1’’ and vice
versa.
A logical ‘‘1’’ preset enable signal allows information at the
‘‘jam’’ inputs to preset the counter to any state asynchro-
nously with the clock. The counter is advanced one count at
the positive-going edge of the clock if the carry in and pre-
set enable inputs are at logical ‘‘0’’. Advancement is inhibit-
ed when either or both of these two inputs is at logical ‘‘1’’.
The carry out signal is normally at logical ‘‘1’’ state and goes
to logical ‘‘0’’ state when the counter reaches its maximum
count in the ‘‘up’’ mode or the minimum count in the ‘‘down’’
mode provided the carry input is at logical ‘‘0’’ state.
All inputs are protected against static discharge by diode
clamps to both V
DD
and V
SS
.
Features
Y
Wide supply voltage range
3V to 15V
0.45 V
DD
(typ.)
fan out of 2
driving 74L
or 1 driving 74LS
Y
High noise immunity
Y
Low power
TTL compatibility
Y
Parallel jam inputs
Y
Binary or BCD decade up/down counting
Logic Diagram
TL/F/5960–1
C
1995 National Semiconductor Corporation
RRD-B30M105/Printed in U. S. A.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CD4029BM | Presettable Binary/Decade Up/Down Counter(可預(yù)置的二進(jìn)制/十進(jìn)制可逆計(jì)數(shù)器) |
| CD4029BC | Presettable Binary/Decade Up/Down Counter(可預(yù)置二進(jìn)制/十進(jìn)制加/減計(jì)數(shù)器) |
| CD4029BMS | CMOS Presettable Up/Down Counter(CMOS可預(yù)置加/減計(jì)數(shù)器) |
| CD4029 | CMOS PRESETTABLE UP/DOWN COUNTER |
| CD4029BH(SMD) | CMOS PRESETTABLE UP/DOWN COUNTER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CD4029BCN | 功能描述:計(jì)數(shù)器 IC Binary/Decade Ctr RoHS:否 制造商:NXP Semiconductors 計(jì)數(shù)器類型:Binary Counters 邏輯系列:74LV 位數(shù):10 計(jì)數(shù)法: 計(jì)數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
| CD4029BCSJ | 功能描述:計(jì)數(shù)器 IC Binary/Decade Ctr RoHS:否 制造商:NXP Semiconductors 計(jì)數(shù)器類型:Binary Counters 邏輯系列:74LV 位數(shù):10 計(jì)數(shù)法: 計(jì)數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
| CD4029BCSJX | 功能描述:計(jì)數(shù)器 IC Binary/Decade Ctr RoHS:否 制造商:NXP Semiconductors 計(jì)數(shù)器類型:Binary Counters 邏輯系列:74LV 位數(shù):10 計(jì)數(shù)法: 計(jì)數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
| CD4029BCWM | 功能描述:計(jì)數(shù)器 IC Binary/Decade Ctr RoHS:否 制造商:NXP Semiconductors 計(jì)數(shù)器類型:Binary Counters 邏輯系列:74LV 位數(shù):10 計(jì)數(shù)法: 計(jì)數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
| CD4029BCWMX | 功能描述:計(jì)數(shù)器 IC Binary/Decade Ctr RoHS:否 制造商:NXP Semiconductors 計(jì)數(shù)器類型:Binary Counters 邏輯系列:74LV 位數(shù):10 計(jì)數(shù)法: 計(jì)數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
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