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參數(shù)資料
| 型號(hào)： | CD-700KACGAB-54.000 |
| 廠商： | VECTRON INTERNATIONAL |
| 元件分類(lèi)： | XO, clock |
| 英文描述： | PHASE LOCKED LOOP, CQCC16 |
| 封裝： | HERMETIC SEALED, CERAMIC, SMD-16 |
| 文件頁(yè)數(shù)： | 14/14頁(yè) |
| 文件大?。?/td> | 146K |
| 代理商： | CD-700KACGAB-54.000 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)當(dāng)前第14頁(yè)
CD-700, VCXO Based PLL
Vectron International
166 Glover Avenue, Norwalk, CT 06856 Tel: 1-88-VECTRON-1 http://www.vectron.com
Layout Considerations
To achieve stable, low noise performance good analog layout techniques should be incorporated and a
partial list is shown below.
The CD-700 should be treated more like an analog device and the power supply must be well decoupled
with a good quality RF 0.01 uF capacitor in parallel with a 0.1 uF capacitor, located as close to pin 14 as
possible and connected to ground. In some cases, a
Π filter such as a large capacitor (10uF) to ground, a
series ferrite bead or inductor with 0.01 uF and 100 pF capacitor to ground to decouple the device supply.
The traces for the OUT1, OUT2, RCLK and RDATA ouputs should be kept as short as possible. It is
common practice to use a series resistor ( 50 to 100 ohms ) in order to reduce reflections if these traces
are more than a couple of inches long. Also OUT1, OUT2, RCLK and RDATA should not be routed
directly underneath the device.
The op-amp loop filter components should be kept as close to the device as possible and the feedback
capacitor should be located close to the op-amp input terminal. The loop filter capacitor(s) should be low
leakage (polarized capacitors are allowed).
Unused outputs should be left floating and it is not required to load or terminate them (such as an ECL or
PECL output). Loading unused outputs will only increase current consumption.
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PDF描述 |
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| CD-700KACGEB-62.208 | PHASE LOCKED LOOP, CQCC16 |
| CD-700KACGHB-40.000 | PHASE LOCKED LOOP, CQCC16 |
| CD-700KACHCB-28.704 | PHASE LOCKED LOOP, CQCC16 |
| CD-700KACHFB-32.000 | PHASE LOCKED LOOP, CQCC16 |
| CD-700KACNAB-62.208 | PHASE LOCKED LOOP, CQCC16 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CD-700-KAC-GAB-60.000 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Phase-Locked Loop |
| CD-700-KAC-GAB-61.440 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Phase-Locked Loop |
| CD-700-KAC-GAB-62.208 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Phase-Locked Loop |
| CD-700-KAC-GAB-62.500 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Phase-Locked Loop |
| CD-700-KAC-GAB-65.536 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Phase-Locked Loop |
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