參數(shù)資料
型號(hào): CBTL06121BHF
廠商: NXP Semiconductors N.V.
元件分類(lèi): 編、解碼器及復(fù)用、解復(fù)用
英文描述: Gen1 hex display multiplexer
封裝: CBTL06121AHF<SOT1033-1 (HWQFN56R)|<<http://www.nxp.com/packages/SOT1033-1.html<1<Always Pb-free,;CBTL06121BHF<SOT1033-1 (HWQFN56R)|<<http://www.nxp.com/packages/SOT1033-1
文件頁(yè)數(shù): 20/20頁(yè)
文件大?。?/td> 162K
代理商: CBTL06121BHF
CBTL06121
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NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 26 October 2010
9 of 20
NXP Semiconductors
CBTL06121
Gen1 hex display multiplexer
7.
Functional description
The CBTL06121 uses 3.3 V power supply. All signal paths are implemented using
high-bandwidth pass-gate technology, are bidirectional and no clock or reset signal is
needed for the multiplexer to function.
The switch position is selected using the select signal (SEL), which can be latched using
the latch enable pin (LE_N). The detailed operation is described in Section 7.1.
7.1 MUX select (SEL) function
The internal multiplexer switch position is controlled by two logic inputs SEL and LE_N as
described below.
The switch position select input signal SEL controls the MUX through a flow-through latch,
which is gated by the latch enable input signal LE_N (active LOW). The latch is open
when LE_N is LOW; in this state the internal switch position will respond to the state of the
SEL input signal. The latch is closed when LE_N is HIGH, and the switch position will not
respond to input state changes on the SEL input.
Table 3.
MUX select control
SEL
Dx
TXx; RXx
0
high-impedance
active; follows IN_x
1
active; follows IN_x
high-impedance
Table 4.
MUX select latch control
LE_N
Internal MUX select
0
responds to changes on SEL
1latched
Fig 7.
MUX select function
002aad088
IN_x+
Dx+
TXx+
IN_x
Dx
TXx
internal
MUX select
TRANSPARENT
LATCH
SEL
LE_N
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