參數(shù)資料
型號： CBTL04083BBS
廠商： NXP Semiconductors N.V.
元件分類： PCI/cPCI/PXI
英文描述： 3.3 V, 4 differential channel, 2 : 1 multiplexer-demultiplexer switch for PCI Express Gen3
封裝： CBTL04083ABS<SOT1144-1 (HVQFN42)|<<http://www.nxp.com/packages/SOT1144-1.html<1<Always Pb-free,;CBTL04083BBS<SOT1144-1 (HVQFN42)|<<http://www.nxp.com/packages/SOT1144-1.h
文件頁數(shù)： 13/18頁
文件大小： 437K
代理商： CBTL04083BBS
CBTL04083A_CBTL04083B
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 24 August 2011
4 of 18
NXP Semiconductors
CBTL04083A; CBTL04083B
3.3 V, 4 differential channel, 2 : 1 MUX/deMUX switch for PCIe Gen3
[1]
HVQFN32 package die supply ground is connected to both GND pins and exposed center pad. GND pins and the exposed center pad
must be connected to supply ground for proper device operation. For enhanced thermal, electrical, and board level performance, the
exposed pad needs to be soldered to the board using a corresponding thermal pad on the board and for proper heat conduction through
the board, thermal vias need to be incorporated in the printed-circuit board in the thermal pad region.
B0_P
38
37
I/O
channel 0, port B differential signal input/output
B0_N
37
36
I/O
B1_P
36
33
I/O
channel 1, port B differential signal input/output
B1_N
35
32
I/O
B2_P
29
28
I/O
channel 2, port B differential signal input/output
B2_N
28
27
I/O
B3_P
27
24
I/O
channel 3, port B differential signal input/output
B3_N
26
23
I/O
C0_P
34
3
I/O
channel 0, port C differential signal input/output
C0_N
33
4
I/O
C1_P
32
7
I/O
channel 1, port C differential signal input/output
C1_N
31
8
I/O
C2_P
25
12
I/O
channel 2, port C differential signal input/output
C2_N
24
13
I/O
C3_P
23
16
I/O
channel 3, port C differential signal input/output
C3_N
22
17
I/O
SEL
9
30
CMOS
single-ended input
operation mode select
SEL = LOW: A
B
SEL = HIGH: A
C
XSD01
41
40
CMOS
single-ended input
Shutdown pin; should be driven LOW or connected to
GND for normal operation. When HIGH, channel 0 and
channel 1 are switched off (non-conducting
high-impedance state), and supply current consumption
is minimized.
XSD23
19
20
CMOS
single-ended input
Shutdown pin; should be driven LOW or connected to
GND for normal operation. When HIGH, channel 2 and
channel 3 are switched off (non-conducting
high-impedance state), and supply current consumption
is minimized.
VDD
5, 8, 13, 18,
20, 30, 40, 42
9, 19, 21, 26,
31, 34, 39, 41
power
positive supply voltage, 3.3 V
10 %
1, 4, 10, 14,
17, 21, 39,
center pad
18, 22, 25,
29, 35, 38, 42,
center pad
power
supply ground
Table 2.
Pin description …continued
Symbol
Pin
Type
Description
CBTL04083A
CBTL04083B
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CBTL04DP211BS 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:DisplayPort 2 : 1 multiplexer
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