參數(shù)資料
型號(hào): CBTL02043BBQ
廠商: NXP SEMICONDUCTORS
元件分類: 編、解碼器及復(fù)用、解復(fù)用
英文描述: 3.3 V, 2 differential channel, 2 : 1 multiplexer-demultiplexer switch for PCI Express Gen3
中文描述: MULTIPLEXER AND DEMUX/DECODER, PQCC20
封裝: 2.50 X 4.50 MM, 0.85 MM PITCH, PLASTIC, DHVQFN-20
文件頁數(shù): 10/16頁
文件大?。?/td> 202K
代理商: CBTL02043BBQ
CBTL02043A_CBTL02043B
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 10 March 2011
3 of 16
NXP Semiconductors
CBTL02043A; CBTL02043B
3.3 V, 2 differential channel, 2 : 1 MUX/deMUX switch for PCIe Gen3
6.
Pinning information
6.1 Pinning
6.2 Pin description
a. CBTL02043A
b. CBTL02043B
Fig 2.
Pin configuration for DHVQFN20
002aaf912
CBTL02043A
Transparent top view
C1_N
A1_N
SEL
C1_P
A1_P
C0_N
VDD
C0_P
GND
B1_N
A0_N
B1_P
A0_P
B0_N
XSD
B0_P
V
DD
GND
V
DD
GND
9
12
8
13
7
14
6
15
5
16
4
17
3
18
2
19
10
11
1
20
terminal 1
index area
002aaf913
CBTL02043B
Transparent top view
SEL
C1_P
C1_N
B1_N
A1_N
B1_P
A1_P
GND
C0_N
VDD
C0_P
B0_N
A0_N
B0_P
A0_P
XSD
GND
V
DD
GND
V
DD
9
12
8
13
7
14
6
15
5
16
4
17
3
18
2
19
10
11
1
20
terminal 1
index area
Table 2.
Pin description
Symbol
Pin
Type
Description
CBTL02043A
CBTL02043B
A0_P
3
2
I/O
channel 0, port A differential signal
input/output
A0_N
4
3
I/O
A1_P
7
6
I/O
channel 1, port A differential signal
input/output
A1_N
8
7
I/O
B0_P
19
18
I/O
channel 0, port B differential signal
input/output
B0_N
18
17
I/O
B1_P
17
14
I/O
channel 1, port B differential signal
input/output
B1_N
16
13
I/O
C0_P
15
4
I/O
channel 0, port C differential signal
input/output
C0_N
14
5
I/O
C1_P
13
8
I/O
channel 1, port C differential signal
input/output
C1_N
12
9
I/O
SEL
9
12
CMOS
single-ended
input
operation mode select
SEL = LOW: A
B
SEL = HIGH: A
C
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