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參數(shù)資料
| 型號： | CBTD3861DK |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | 10-bit level shifting bus switch with output enable |
| 中文描述： | CBT/FST/QS/5C/B SERIES, 10-BIT DRIVER, TRUE OUTPUT, PDSO24 |
| 封裝： | 3.90 MM, 0.635 MM PITCH, PLASTIC, MO-137, SOT556-1, SSOP-24 |
| 文件頁數(shù)： | 16/16頁 |
| 文件大小： | 314K |
| 代理商： | CBTD3861DK |
CBTD3861
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 1 — 19 August 2010
9 of 16
NXP Semiconductors
CBTD3861
10-bit level shifting bus switch with output enable
12. Test information
Test data is given in Table 9.
All input pulses are supplied by generators having the following characteristics: PRR
≤ 10 MHz; Z
o =50 Ω.
The outputs are measured one at a time with one transition per measurement.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 12. Test circuit for measuring switching times
VM
tW
10 %
90 %
0 V
VI
negative
pulse
positive
pulse
0 V
VM
90 %
10 %
tf
tr
f
001aae331
VEXT
VCC
VI
VO
DUT
CL
RT
RL
G
Table 9.
Test data
Supply voltage
Input
Load
VEXT
VI
tr, tf
CL
RL
tPLH, tPHL
tPLZ, tPZL
tPHZ, tPZH
VCC = 5.0 V ± 0.5 V
GND to 3.0 V
≤ 2.5 ns
50 pF
500
Ω
open
7.0 V
open
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