參數(shù)資料
型號: CBTD3306D
廠商: NXP Semiconductors N.V.
元件分類: 開關(guān)
英文描述: Dual bus switch with level shifting
中文描述: 雙總線電平轉(zhuǎn)換開關(guān)
封裝: CBTD3306D<SOT96-1 (SO8)|<<http://www.nxp.com/packages/SOT96-1.html<1<week 5, 2005,;CBTD3306D<SOT96-1 (SO8)|<<http://www.nxp.com/packages/SOT96-1.html<1<week 5, 2005
文件頁數(shù): 12/17頁
文件大?。?/td> 140K
代理商: CBTD3306D
CBTD3306
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product Specification
Rev. 5 — 28 April 2011
4 of 17
NXP Semiconductors
CBTD3306
Dual bus switch with level shifting
10. Static characteristics
[1]
All typical values are at VCC =5V, Tamb =25
°C.
[2]
This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
[3]
Measured by the voltage drop between the nA and the nB terminals at the indicated current through the switch. ON resistance is
determined by the lowest voltage of the two (nA or nB) terminals.
Table 7.
Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Tamb =
40 °C to +85 °C
Unit
Min
Typ[1]
Max
VIK
input clamping voltage
VCC =4.5 V; II =
18 mA
-
1.2
V
II
input leakage current
VCC =5.5 V; VI = GND or 5.5 V
-
±1
μA
ICC
supply current
VCC =5.5 V; ISW =0mA;
VI =VCC or GND
--
1.5
mA
Vpass
pass voltage
---
V
ΔICC
additional supply current
per input pin; VCC =5.5 V;
one input at 3.4 V, other inputs at
VCC or GND
--
2.5
mA
CI
input capacitance
control pin; VI = 3 V or 0 V
-
3.2
-
pF
Cio(off)
off-state input/output
capacitance
port off; VI = 3 V or 0 V; nOE =VCC
-6.5
-
pF
RON
ON resistance
VCC =4.5 V; VI =0V; II =64 mA
-3.6
5
Ω
VCC =4.5 V; VI =0V; II =30 mA
-3.6
5
Ω
VCC =4.5 V; VI =2.4 V; II =15 mA
-17
35
Ω
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