參數資料
型號: CAT93C76SE-1.8TE13REVA
廠商: ON SEMICONDUCTOR
元件分類: PROM
英文描述: 512 X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8
封裝: SOIC-8
文件頁數: 4/10頁
文件大?。?/td> 405K
代理商: CAT93C76SE-1.8TE13REVA
3
CAT93C76
Doc. No. 1090, Rev. M
PIN CAPACITANCE
Symbol
Test
Conditions
Min
Typ
Max
Units
COUT(1)
Output Capacitance (DO)
VOUT=0V
5
pF
CIN(1)
Input Capacitance (CS, SK, DI, ORG)
VIN=0V
5
pF
INSTRUCTION SET(2)
Limits
VCC =
1.8V-5.5V
Test
Symbol
Parameter
Conditions
Min
Max
Units
tCSS
CS Setup Time
50
ns
tCSH
CS Hold Time
0
ns
tDIS
DI Setup Time
50
ns
tDIH
DI Hold Time
50
ns
tPD1
Output Delay to 1
0.15
s
tPD0
Output Delay to 0
0.15
s
tHZ(1)
Output Delay to High-Z
100
ns
tEW
Program/Erase Pulse Width
5
ms
tCSMIN
Minimum CS Low Time
0.15
s
tSKHI
Minimum SK High Time
0.15
s
tSKLOW
Minimum SK Low Time
0.15
s
tSV
Output Delay to Status Valid
0.1
s
SKMAX
Maximum Clock Frequency
DC
3000
kHz
A.C. CHARACTERISTICS
CL = 100pF
(3)
NOTE:
(1) This parameter is tested initially and after a design or process change that affects the parameter.
(2) Address bit A10 for the 1,024x8 org. and A9 for the 512x16 org. are “don’t care” bits, but must be kept at either a “1” or
“0” for READ, WRITE and ERASE commands.
(3) The input levels and timing reference points are shown in the “AC Test Conditions” table.
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8
x6
1
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1
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D
A
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R1
0
10
A
-
0
1
A0
A
-
9
A0
A
N
A
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R
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A
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E1
1
10
A
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0
1
A0
A
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9
A0
A
N
A
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W1
1
00
A
-
0
1
A0
A
-
9
A0
D
-
7
D0
D
-
5
1
D0
A
N
A
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A
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N
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W
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0
X
1
1X
X
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1X
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0X
X
XX
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X
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1X
X
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X
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A
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A
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C
L
A
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W1
0
1
0X
X
XX
X
X1
0X
X
XX
X
0
D
-
7
D0
D
-
5
1
Ds
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