參數(shù)資料
型號(hào): CAT93C56XI-GT3
英文描述: 2-Kb Microwire Serial CMOS EEPROM
中文描述: 2 KB的Microwire串行EEPROM中的CMOS
文件頁(yè)數(shù): 2/18頁(yè)
文件大?。?/td> 370K
代理商: CAT93C56XI-GT3
CAT93C56, CAT93C57
Doc. No. MD-1088 Rev. P
2
Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Absolute Maximum Ratings
(1)
Parameters
Storage Temperature
Voltage on Any Pin with Respect to Ground
(2)
Ratings
-65 to +150
-0.5 to +6.5
Units
°C
V
Reliability Characteristics
(3)
Symbol Parameter
NEND
(4)
Endurance
TDR
Data Retention
Min
Units
1,000,000
100
Program/ Erase Cycles
Years
D.C. OPERATING CHARACTERISTICS, CAT93C56, Die Rev. G – New Product
V
CC
= +1.8V to +5.5V, T
A
=-40°C to +85°C unless otherwise specified.
Symbol
Parameter
Test Conditions
Min
Max
Units
I
CC1
I
CC2
Power Supply Current (Write)
f
SK
= 1MHz, V
CC
= 5.0V
f
SK
= 1MHz, V
CC
= 5.0V
V
IN
= GND or V
CC
, CS = GND
ORG = GND
V
IN
= GND or V
CC
, CS = GND
ORG = Float or V
CC
V
IN
= GND to V
CC
V
OUT
= GND to V
CC
, CS = GND
4.5V
V
CC
< 5.5V
4.5V
V
CC
< 5.5V
1.8V
V
CC
< 4.5V
1.8V
V
CC
< 4.5V
4.5V
V
CC
< 5.5V, I
OL
= 2.1mA
4.5V
V
CC
< 5.5V, I
OH
= -400μA
1.8V
V
CC
< 4.5V, I
OL
= 1mA
1.8V
V
CC
< 4.5V, I
OH
= -100μA
1
mA
Power Supply Current (Read)
Power Supply Current
(Standby) (x8 Mode)
Power Supply Current
(Standby) (x16 Mode)
Input Leakage Current
500
μA
I
SB1
2
μA
I
SB2
1
μA
I
LI
I
LO
V
IL1
V
IH1
V
IL2
V
IH2
V
OL1
V
OH1
V
OL2
V
OH2
1
μA
Output Leakage Current
1
μA
Input Low Voltage
-0.1
0.8
V
Input High Voltage
2
V
CC
+ 1
V
CC
x 0.2
V
CC
+ 1
0.4
V
Input Low Voltage
0
V
Input High Voltage
V
CC
x 0.7
V
Output Low Voltage
V
Output High Voltage
2.4
V
Output Low Voltage
0.2
V
Output High Voltage
V
CC
- 0.2
V
Notes:
(1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this
specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability.
(2) The DC input voltage on any pin should not be lower than -0.5V or higher than V
CC
+ 0.5V. During transitions, the voltage on any pin may
undershoot to no less than -1.5V or overshoot to no more than V
CC
+ 1.5V, for periods of less than 20 ns.
(3) These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC-Q100
and JEDEC test methods.
(4) Block Mode, V
CC
= 5V, 25°C
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