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參數(shù)資料
| 型號： | CAT661EVA-TE13 |
| 英文描述： | High Frequency 100mA CMOS Charge Pump, Inverter/Doubler |
| 中文描述： | 高頻100mA的CMOS電荷泵，逆變器/倍增 |
| 文件頁數(shù)： | 9/16頁 |
| 文件大?。?/td> | 488K |
| 代理商： | CAT661EVA-TE13 |
CAT661
9
Doc. No. 5003, Rev. J
VRIPPLE (mV)
IOUT (mA)
FOSC (kHz)
C2 (
μ
F)
C2 ESR (
)
45
100
25
150
0.2
25
100
135
150
0.2
CAPACITOR SELECTION
Low ESR capacitors are necessary to minimize voltage
losses, especially at high load currents. The exact
values of C1 and C2 are not critical but low ESR
capacitors are necessary.
The ESR of capacitor C1, the pump capacitor, can have
a pronounced effect on the output. C1 currents are
approximately twice the output current and losses occur
on both the charge and discharge cycle. The ESR
effects are thus multiplied by four. A 0.5
ESR for C1 will
have the same effect as a 2
increase in CAT661 output
impedance.
Output voltage ripple is determined by the value of C2
and the load current. C2 is charged and discharged at a
current roughly equal to the load current. The internal
switching frequency is one-half the oscillator frequency.
VRIPPLE = IOUT/(FOSC x C2) + IOUT x ESRC2
For example, with a 25kHz oscillator frequency (12.5kHz
switching frequency), a 150
μ
F C2 capacitor with an ESR
of 0.2
and a 100mA load peak-to-peak the ripple
voltage is 45mV.
VRIPPLE vs. FOSC
Figure 6. Oscillator
Figure 7. External Clocking
BOOST/FC
(1)
LV
(6)
OSC
(7)
~18pF
I
7.0 I
7.0 I
I
V+
+
-V+
C2
1
2
3
4
8
7
6
5
REQUIRED FOR TTL LOGIC
CAT661
V+
100k
OSC INPUT
NC
+
C1
BOOST/FC
CAP+
GND
CAP-
V+
OSC
LV
OUT
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