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參數(shù)資料
| 型號： | CAT64LC20YTE13 |
| 英文描述： | 1K/2K/4K-Bit SPI Serial EEPROM |
| 中文描述： | 1K/2K/4K-Bit的SPI串行EEPROM |
| 文件頁數(shù)： | 6/12頁 |
| 文件大?。?/td> | 309K |
| 代理商： | CAT64LC20YTE13 |
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6
CAT64LC10/20/40
Doc. No. 1021, Rev. C
DEVICE OPERATION
The CAT64LC10/20/40 is a 1K/2K/4K-bit nonvolatile
memory intended for use with all standard controllers.
The CAT64LC10/20/40 is organized in a 64/128/256 x
16 format. All instructions are based on an 8-bit format.
There are four 16-bit instructions: READ, WRITE, EWEN,
and EWDS. The CAT64LC10/20/40 operates on a single
power supply ranging from 2.5V to 6.0V and it has an on-
chip voltage generator to provide the high voltage needed
during a programming operation. Instructions, addresses
and data to be written are clocked into the DI pin on the
rising edge of the SK clock. The DO pin is normally in a
high impedance state except when outputting data in a
READ operation or outputting RDY/
BSY
status when
polled during a WRITE operation.
a 4-bit start sequence, 1010, a 4-bit op code and an 8-
bit address field or dummy bits. For a WRITE operation,
Figure 2. Sychronous Data Timing
Figure 3. Read Instruction Timing
* Please check the instruction set table for address
SK
DI
CS
DO
tPD0,tPD1
tCSS
tDIS
tSKHI
tSKLOW
RESET
RDY/
BUSY
tRESS
tRC
tDIH
tCSH
tCSMIN
tHZ
tSV
tSV
tRESH
SK
DI
CS
DO
RESET
1
0
1
0
1
0
0
0
ADDRESS*
D15 D14
D1
D0
HIGH
RDY/
BUSY
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