參數(shù)資料
型號: CAT5271ZI-50-GT3
廠商: ON Semiconductor
文件頁數(shù): 3/13頁
文件大?。?/td> 0K
描述: IC POT DPP 50K 256TAP 10MSOP
標準包裝: 1
接片: 256
電阻(歐姆): 50k
電路數(shù): 2
溫度系數(shù): 標準值 100 ppm/°C
存儲器類型: 易失
接口: I²C
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應商設(shè)備封裝: 10-MSOP
包裝: 標準包裝
其它名稱: CAT5271ZI-50-GT3OSDKR
CAT5271, CAT5273
http://onsemi.com
11
INSTRUCTION AND REGISTER DESCRIPTION
Slave Address Byte
The first byte sent to the CAT5271 from the master/processor
is called the Slave Address Byte. The most significant seven
bits of the slave address are a device type identifier. For the
CAT5271, these bits are fixed at 0101111. For CAT5273, the
first five bits are fixed as 01011, and the next two bits of the
device identifier are determined by the logic levels on the
AD1 and AD0 pins. The following bit (R/W) selects
between a Read or a Write operation. If the bit is logic high,
then a Read instruction is performed. If the bit is low, then
the Write command is executed.
Instruction Byte
Write and Read instructions are respectively three and two
bytes in length. The basic sequence of the two instructions
is illustrated in Table 10 and 11.
Write Operation
In the write instruction, the second byte first bit (A0)
selects between the potentiometer 1 and 2: a logic low is for
the potentiometer 1, and a logic high is for potentiometer 2.
The following bit (SD) is the shutdown bit. A logic high
causes an open circuit at terminal A while shorting the wiper
terminal W to terminal B. The “shutdown” operation does
not change the contents of the wiper register. When the
shutdown bit, SD, goes back to a logic low, the previous
wiper position is restored. Also during shutdown, new
settings can be programmed. As soon as the device is
returned from shutdown, the wiper position is set according
to the wiper register value.
The remainder of the bits in the instruction byte are don’t
care bits.
Read Operation
In the read mode, the data byte follows immediately after
the acknowledgment of the slave address byte. Data is
transmitted over the serial bus in sequences.
There is no potentiometer channel selection bit in the
Read command. The addressed channel is the one that is
previously selected in the write mode. If it desired to read the
potentiometer wiper register values of both channels, the
first potentiometer must be addressed in write mode and
then change to read mode to read the first channel value.
After that, the user must return the device to write mode with
the second potentiometer selected and read the second
potentiometer wiper register value in read mode. It is not
necessary for users to issue the third data byte in write mode
for subsequent read operation.
Wiper Control
The CAT5271/CAT5273 contains two 8-bit Wiper
Control Register (WCR). The Wiper Control Register
output is decoded to select one of 256 switches along its
resistor array. The contents of the WCR may be written by
the host via Write instruction.
The Wiper Control Registers are a volatile register that
loses its contents when the CAT5271/CAT5273 is
powered-down. Upon power-up, the wiper is set to midscale
and may be repositioned anytime after the power has
become stable.
Table 10. CAT5271 Write
S
0
1
0
1
W
A
A0
SD
X
A
D7
D6
D5
D4
D3
D2
D1
D0
A
P
Slave Address Byte
Instruction Byte
Data Byte
S
T
A
R
T
01 0
1 1
A
C
K
A0
XX X X
A
C
K
SDA
S
T
O
P
A
C
K
D7
Slave Address Byte
Instruction Byte
Data Byte
SD
X
D6
D5
D4
D3
D2
D1
D0
R/W
11
X
Table 11. CAT5271 READ
S
0
1
0
1
R
A
D7
D6
D5
D4
D3
D2
D1
D0
A
P
Slave Address Byte
Data Byte
S
T
A
R
T
01 0
1 1
A
C
K
SDA
S
T
O
P
N
C
K
D7
Slave Address Byte
Data Byte
D6
D5
D4
D3
D2
D1
D0
R/W
A
11
Legend
S =
Start
P =
Stop
A =
Acknowledge
D =
Data bit
R =
Read (bit is 1 for Read instruction)
W =
Write (bit is 0 for Write instruction)
A0 =
Potentiometer Channel (1 or 2) Select Bit
SD =
Shut Down:
0: normal operation
1: wiper is parked at B terminal and
terminal A is open circuit.
X =
Don’t Care
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