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參數(shù)資料
| 型號： | CAT525 |
| 元件分類： | 數(shù)字電位計(jì) |
| 英文描述： | Configured Digitally Programmable Potentiometer (DPP⑩): Programmable Voltage Applications |
| 中文描述： | 配置數(shù)字可編程電位（民進(jìn)黨⑩）：可編程電壓應(yīng)用 |
| 文件頁數(shù)： | 5/12頁 |
| 文件大?。?/td> | 82K |
| 代理商： | CAT525 |
CAT525
5
Doc. No. 25078-00 4/01 - A M-1
PIN DESCRIPTION
Pin
Name
Function
1
2
3
4
5
6
7
8
9
V
REF
H2
V
REF
H1
V
DD
CLK
RDY/
BSY
CS
DI
DO
PROG
Maximum DAC 2 output voltage
Maximum DAC 1 output voltage
Power supply positive
Clock input pin
Ready/Busy output
Chip select
Serial data input pin
Serial data output pin
EEPROM Programming Enable
Input
Power supply ground
Minimum DAC 1 output voltage
Minimum DAC 2 output voltage
Minimum DAC 3 output voltage
Minimum DAC 4 output voltage
DAC 4 output
DAC 3 output
DAC 2 output
DAC 1 output
Maximum DAC 4 output voltage
Maximum DAC 3 output voltage
10
11
12
13
14
15
16
17
18
19
20
GND
V
REF
L1
V
REF
L2
V
REF
L3
V
REF
L4
V
OUT
4
V
OUT
3
V
OUT
2
V
OUT
1
V
REF
H4
V
REF
H3
DEVICE OPERATION
The CAT525 is a quad 8-bit Digital to Analog Converter
(DAC) whose outputs can be programmed to any one of
256 individual voltage steps. Once programmed, these
output settings are retained in non-volatile EEPROM
memory and will not be lost when power is removed from
the chip. Upon power up the DACs return to the settings
stored in EEPROM memory. Each DAC can be written
to and read from independently without effecting the
output voltage during the read or write cycle. Each
output can also be adjusted without altering the stored
output setting, which is useful for testing new output
settings before storing them in memory.
DIGITAL INTERFACE
The CAT525 employs a standard 3 wire serial control
interface consisting of Clock (CLK), Chip Select (CS)
and Data In (DI) inputs. For all operations, address and
data are shifted in LSB first. In addition, all digital data
must be preceded by a logic “1” as a start bit. The DAC
address and data are clocked into the DI pin on the
clock’s rising edge. When sending multiple blocks of
information a minimum of two clock cycles is required
between the last block sent and the next start bit.
Multiple devices may share a common input data line by
selectively activating the CS control of the desired IC.
Data Outputs (DO) can also share a common line
because the DO pin is Tri-Stated and returns to a high
impedance when not in use.
CHIP SELECT
Chip Select (CS) enables and disables the CAT525’s
read and write operations. When CS is high data may be
read to or from the chip, and the Data Output (DO) pin is
active. Data loaded into the DAC control registers will
remain in effect until CS goes low. Bringing CS to a logic
low returns all DAC outputs to the settings stored in
EEPROM memory and switches DO to its high imped-
ance Tri-State mode.
Because CS functions like a reset the CS pin has been
desensitized with a 30 ns to 90 ns filter circuit to prevent
noise spikes from causing unwanted resets and the loss
of volatile data.
CLOCK
The CAT525’s clock controls both data flow in and out of
the IC and EEPROM memory cell programming. Serial
data is shifted into the DI pin and out of the DO pin on the
clock’s rising edge. While it is not necessary for the clock
to be running between data transfers, the clock must be
operating in order to write to EEPROM memory, even
though the data being saved may already be resident in
the DAC control register.
No clock is necessary upon system power-up. The
CAT525’s internal power-on reset circuitry loads data
from EEPROM to the DACs without using the external
clock.
DAC addressing is as follows:
DAC OUTPUT
A0
A1
V
OUT
1
V
OUT
2
V
OUT
3
V
OUT
4
0
0
1
0
0
1
1
1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CAT525JI | 1-Mbit (64K x 16) Static RAM |
| CAT525P | 1-Mbit (64K x 16) Static RAM |
| CAT521JI-TE13 | 1-Mbit (64K x 16) Static RAM |
| CAT521J-TE13 | 1-Mbit (64K x 16) Static RAM |
| CAT521P | 1-Mbit (64K x 16) Static RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CAT5251WI00 | 制造商:ON Semiconductor 功能描述:DPP, NV, QUAD 256 TAPS, SPI - Rail/Tube |
| CAT5251WI-00 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Catalyst Semiconductor 功能描述: |
| CAT5251WI-00-T1 | 功能描述:數(shù)字電位計(jì) IC DPP NV QUAD 256 TAP SPI RoHS:否 制造商:Maxim Integrated 電阻:200 Ohms 溫度系數(shù):35 PPM / C 容差:25 % POT 數(shù)量:Dual 每 POT 分接頭:256 弧刷存儲器:Volatile 緩沖刷: 數(shù)字接口:Serial (3-Wire, SPI) 描述/功能:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 工作電源電壓:1.7 V to 5.5 V 電源電流:27 uA 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFN-16 封裝:Reel |
| CAT5251WI50 | 功能描述:數(shù)字電位計(jì) IC Ind Temp 50K Up/Dwn Quad 256-Tap SPI RoHS:否 制造商:Maxim Integrated 電阻:200 Ohms 溫度系數(shù):35 PPM / C 容差:25 % POT 數(shù)量:Dual 每 POT 分接頭:256 弧刷存儲器:Volatile 緩沖刷: 數(shù)字接口:Serial (3-Wire, SPI) 描述/功能:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 工作電源電壓:1.7 V to 5.5 V 電源電流:27 uA 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFN-16 封裝:Reel |
| CAT5251WI-50 | 制造商:ON Semiconductor 功能描述:IC DIGITAL POT 50KOHM 256 QUAD SOIC-24 |
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