towards the RH
參數(shù)資料
型號(hào): CAT5251YI-00-T2
廠商: ON Semiconductor
文件頁數(shù): 2/15頁
文件大小: 0K
描述: IC POT DPP 100K 256TAP 24TSSOP
標(biāo)準(zhǔn)包裝: 2,000
系列: DPP
接片: 256
電阻(歐姆): 100k
電路數(shù): 4
溫度系數(shù): 標(biāo)準(zhǔn)值 300 ppm/°C
存儲(chǔ)器類型: 非易失
接口: 6 線 SPI(芯片選擇,設(shè)備位址)
電源電壓: 2.5 V ~ 6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 帶卷 (TR)
CAT5251
http://onsemi.com
10
HIGH, the selected wiper will move one resistor segment
towards the RH terminal. Similarly, for each SCK clock
pulse while SI is LOW, the selected wiper will move one
resistor segment towards the RL terminal.
See Instructions format for more detail.
Figure 6. Two-byte Instruction Sequence
01
0
1
A2
A0
I2 I1 I0 R1 R0 P1
SI
ID3 ID2 ID1 ID0
P0
Device ID
Internal
Instruction
Opcode
Address
Register
Address
Pot/WCR
Address
A1
A3
I3
00
Figure 7. Three-byte Instruction Sequence
I3 I2 I1 I0 R1 R0
ID3 ID2 ID1 ID0
Device ID
Internal
Instruction
Opcode
Address
Data
Register
Address
Pot/WCR
Address
WCR[7:0]
or
Data Register D[7:0]
0
101
00
A2 A1 A0
P1 P0
SI
D7 D6 D5 D4 D3 D2 D1 D0
A3
Figure 8. Increment/Decrement Instruction Sequence
I3
I2 I1 I0
ID3 ID2 ID1 ID0
Device ID
Internal
Instruction
Opcode
Address
Data
Register
Address
Pot/WCR
Address
010100
A2 A1 A0
R0 P1 P0
SI
I
N
C
1
I
N
C
2
I
N
C
n
D
E
C
1
D
E
C
n
R1
A3
Figure 9. Increment/Decrement Timing Limits
SCK
SI
INC/DEC
Command
Issued
Voltage Out
tWRL
RW
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