參數(shù)資料
型號: CAT524PI
英文描述: 1-Mbit (64K x 16) Static RAM
中文描述: 數(shù)字電位器
文件頁數(shù): 2/12頁
文件大小: 85K
代理商: CAT524PI
CAT525
2
Doc. No. 2001, Rev. A
I
DD1
Supply Current (Read)
Normal Operating
400
600
μ
A
μ
A
μ
A
I
DD2
Supply Current (Write)
Programming, V
DD
= 5V
1600
2500
V
DD
= 3V
1000
1600
V
DD
Operating Voltage Range
2.7
5.5
V
ABSOLUTE MAXIMUM RATINGS
Supply Voltage*
V
DD
to GND ......................................–0.5V to +7V
Inputs
CLK to GND............................–0.5V to V
DD
+0.5V
CS to GND..............................–0.5V to V
DD
+0.5V
DI to GND ...............................–0.5V to V
DD
+0.5V
RDY/BSY to GND ...................–0.5V to V
DD
+0.5V
PROG to GND ........................–0.5V to V
DD
+0.5V
V
REF
H to GND ........................–0.5V to V
DD
+0.5V
V
REF
L to GND .........................–0.5V to V
DD
+0.5V
Outputs
D
0
to GND...............................–0.5V to V
DD
+0.5V
V
OUT
1– 4 to GND...................–0.5V to V
DD
+0.5V
Operating Ambient Temperature
Commercial (‘C’ or Blank suffix) ...... 0
°
C to +70
°
C
Industrial (‘I’ suffix)...................... – 40
°
C to +85
°
C
Junction Temperature ..................................... +150
°
C
Storage Temperature ....................... –65
°
C to +150
°
C
Lead Soldering (10 sec max) .......................... +300
°
C
* Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Absolute
Maximum Ratings are limited values applied individually while
other parameters are within specified operating conditions,
and functional operation at any of these conditions is NOT
implied. Device performance and reliability may be impaired by
exposure to absolute rating conditions for extended periods of
time.
POWER SUPPLY
RELIABILITY CHARACTERISTICS
Symbol
Parameter
Min
Max
Units
Test Method
V
ZAP(1)
I
LTH(1)(2)
NOTES:
1. This parameter is tested initially and after a design or process change that affects the parameter.
2. Latch-up protection is provided for stresses up to 100mA on address and data pins from –1V to V
CC
+ 1V.
ESD Susceptibility
Latch-Up
2000
100
Volts
mA
MIL-STD-883, Test Method 3015
JEDEC Standard 17
I
IH
Input Leakage Current
V
IN
= V
DD
10
μ
A
μ
A
I
IL
Input Leakage Current
V
IN
= 0V
-10
V
IH
High Level Input Voltage
2
V
DD
V
V
IL
Low Level Input Voltage
0
0.8
V
LOGIC INPUTS
V
OH
High Level Output Voltage
I
OH
= -40
μ
A
V
DD
-0.3
V
V
IL
Low Level Output Voltage
I
OL
= 1 mA, V
DD
= +5V
0.4
V
I
OL
= 0.4 mA, V
DD
= +3V
0.4
V
LOGIC OUTPUTS
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