參數(shù)資料
型號(hào)： CAT514
英文描述： 8-Bit Quad Digital POT(四路，8位數(shù)字電位器)
中文描述： 8位四路數(shù)字電位器（四路，8位數(shù)字電位器）
文件頁數(shù)： 7/11頁
文件大?。?/td> 84K
代理商： CAT514
CAT514
7
Doc. No. 25075-00 2/98 M-1
APPLICATION CIRCUITS
Buffered DAC Output
Amplified DAC Output
this value is the same as that which had been there
previously no change in the DAC
’
s output is noticed.
Had the value held in the control register been different
from that stored in EEPROM then
a change would
occur
at the read cycle
’
s conclusion.
TEMPORARILY CHANGE OUTPUT
The CAT514 allows temporary changes in DAC
’
s output
to be made without disturbing the settings retained in
EEPROM memory. This feature is particularly useful
when testing for a new output setting and allows for user
adjustment of preset or default values without losing the
original factory settings.
Figure 3 shows the control and data signals needed to
effect a temporary output change. DAC settings may be
changed as many times as required and can be made to
any of the four DACs in any order or sequence. The
temporary setting(s) remain in effect long as CS remains
high. When CS returns low all four DACs will return to the
output values stored in EEPROM memory.
When it is desired to save a new setting acquired using
Bipolar DAC Output
OPT 504
GND
VDD
REF
REF
CONTROL
& DATA
+
–
OP 07
VOUT
-15V
+15V
+5V
OUT DAC
OPT 504
GND
VDD
REF
REF
CONTROL
& DATA
+
–
OP 07
VOUT
-15V
+15V
+5V
R
R
i
F
OUT RI
–––
) V
OPT 504
GND
VDD
REF
REF
CONTROL
& DATA
+
–
OP 07
OUT
RF
R +
-15V
+15V
+5V
R
R
i
F
Ri
i
RF
VDAC
For Ri
OUT
RF
i
DAC
Vi
OUT
MSB LSB
1111 1111
255
(.98 REF
1000 0000
128
(.98 REF
0111 1111
255
(.98 REF
0000 0001
255
(.98 REF
0000 0000
0
(.98 REF
REF
REF
F
VREF
RI
OUT
DAC INPUT DAC OUTPUT ANALOG
OUTPUT
REF
REF
OUT
REF
REF
OUT
REF
REF
OUT
REF
REF
OUT
VFS
VZERO
REF
REF
VDAC
CODE
(VFS
ZERO
ZERO
Figure 3. Temporary Change in Output
this feature, the new value must be reloaded into the
DAC control register prior to programming. This is be-
cause the CAT514
’
s internal control circuitry discards
the new data from the programming register two clock
cycles after receiving it (after reception is complete) if no
PROG signal is received.
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
D0
D1
D2
D3
D4
D5
D6
D7
1
NEW DAC DATA
CURRENT DAC DATA
DO
DI
CS
PROG
OUTDAC
to
CURRENT
NON-VOLATILE
DANEW
VOLATILE
CURRENT
NON-VOLATILE
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