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| 型號(hào)： | CAT34WC02YI-1.8TE13 |
| 英文描述： | CY62148E MoBL® 4-Mbit (512K x 8) Static RAM |
| 中文描述： | EEPROM的 |
| 文件頁(yè)數(shù)： | 3/10頁(yè) |
| 文件大?。?/td> | 68K |
| 代理商： | CAT34WC02YI-1.8TE13 |
CAT34AC02
3
Doc No. 1025, Rev. E
Write Cycle Limits
Symbol
Parameter
Min
Typ
Max
Units
t
WR
Write Cycle Time
4
5
ms
A.C. CHARACTERISTICS
V
CC
= +1.8V to +6.0V, unless otherwise specified.
Read & Write Cycle Limits
Note:
(1) This parameter is tested initially and after a design or process change that affects the parameter.
(2) t
PUR
and t
PUW
are the delays required from the time V
CC
is stable until the specified operation can be initiated.
Power-Up Timing
(1)(2)
Symbol
Parameter
Min
Typ
Max
Units
t
PUR
t
PUW
Power-up to Read Operation
Power-up to Write Operation
1
1
ms
ms
The write cycle time is the time from a valid stop
condition of a write sequence to the end of the internal
program/erase cycle. During the write cycle, the bus
interface circuits are disabled, SDA is allowed to remain
high, and the device does not respond to its slave
address.
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相關(guān)代理商/技術(shù)參數(shù) |
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