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參數(shù)資料
| 型號： | CAT25C256P-TE13 |
| 元件分類： | EEPROM |
| 英文描述： | 64K 8K x 8 Battery-Voltage CMOS E2PROM |
| 中文描述： | 64K的8K的× 8電池電壓的CMOS E2PROM的 |
| 文件頁數(shù)： | 6/11頁 |
| 文件大小： | 79K |
| 代理商： | CAT25C256P-TE13 |
6
CAT25C128/256
Doc. No. 25088-00 1/01
Status Register Bits
BP1
Array Address
Protected
Protection
BPO
25C128
25C256
0
0
None
None
No Protection
0
1
3000-3FFF
6000-7FFF
Quarter Array Protection
1
0
2000-3FFF
4000-7FFF
Half Array Protection
1
1
0000-3FFF
0000-7FFF
Full Array Protection
BLOCK PROTECTION BITS
Protected
Blocks
Unprotected
Blocks
Status
Register
WPEN
WP
X
WEL
0
0
Protected
Protected
Protected
0
X
1
Protected
Writable
Writable
1
Low
0
Protected
Protected
Protected
1
Low
1
Protected
Writable
Protected
X
High
0
Protected
Protected
Protected
X
High
1
Protected
Writable
Writable
WRITE PROTECT ENABLE OPERATION
7
6
5
4
3
2
1
0
WPEN
X
X
X
BP1
BP0
WEL
RDY
STATUS REGISTER
STATUS REGISTER
The Status Register indicates the status of the device.
The
RDY
(Ready) bit indicates whether the CAT25C128/
256 is busy with a write operation. When set to 1 a write
cycle is in progress and when set to 0 the device
indicates it is ready. This bit is read only
The WEL (Write Enable) bit indicates the status of the
write enable latch . When set to 1, the device is in a Write
Enable state and when set to 0 the device is in a Write
Disable state. The WEL bit can only be set by the WREN
instruction and can be reset by the WRDI instruction.
The BPO and BP1 (Block Protect) bits indicate which
blocks are currently protected. These bits are set by the
user issuing the WRSR instruction. The user is allowed
to protect quarter of the memory, half of the memory or
the entire memory by setting these bits. Once protected
the user may only read from the protected portion of the
array. These bits are non-volatile.
The WPEN (Write Protect Enable) is an enable bit for the
WP
pin. The
WP
pin and
WPEN bit in the status register
control the programmable hardware write protect fea-
ture. Hardware write protection is enabled when
WP
is
low and WPEN bit is set to high. The user cannot write
to the status register (including the block protect bits and
the WPEN bit) and the block protected sections in the
memory array when the chip is hardware write pro-
tected. Only the sections of the memory array that are
not block protected can be written. Hardware write
protection is disabled when either
WP
pin is high or the
WPEN bit is zero.
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| CAT25C256S-1.8TE13 | 64K 8K x 8 Battery-Voltage CMOS E2PROM |
| CAT25C256SA-1.8TE13 | 64K 8K x 8 Battery-Voltage CMOS E2PROM |
| CAT25C256SA-TE13 | 64K 8K x 8 Battery-Voltage CMOS E2PROM |
| CAT25C256SI-1.8TE13 | 64K 8K x 8 Battery-Voltage CMOS E2PROM |
| CAT25C256SI-TE13 | 64K 8K x 8 Battery-Voltage CMOS E2PROM |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CAT25C256X | 功能描述:電可擦除可編程只讀存儲器 (32kx8) 256K RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT25C256X-1.8 | 功能描述:電可擦除可編程只讀存儲器 (32kx8) 256K RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT25C256XA | 功能描述:電可擦除可編程只讀存儲器 (32kx8) 256K RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT25C256XE-TE13 | 制造商:ON Semiconductor 功能描述:EEPROM Serial-SPI 256K-Bit 32K x 8 3.3V/5V 8-Pin SOIC EIAJ T/R |
| CAT25C256XI | 功能描述:電可擦除可編程只讀存儲器 (32kx8) 256K RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 |
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